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Kévin Redon4cd3f7d2019-01-24 17:57:13 +01001/**
2 * \file
3 *
4 * \brief I/O USART related functionality implementation.
5 *
6 * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Subject to your compliance with these terms, you may use Microchip
13 * software and any derivatives exclusively with Microchip products.
14 * It is your responsibility to comply with third party license terms applicable
15 * to your use of third party software (including open source software) that
16 * may accompany Microchip software.
17 *
18 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
19 * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
20 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
21 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
22 * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
23 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
24 * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
25 * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
26 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
27 * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
28 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
29 *
30 * \asf_license_stop
31 *
32 */
33
34#include "hal_usart_sync.h"
35#include <utils_assert.h>
36#include <utils.h>
37
38/**
39 * \brief Driver version
40 */
41#define DRIVER_VERSION 0x00000001u
42
43static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
44static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
45
46/**
47 * \brief Initialize usart interface
48 */
49int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func)
50{
51 int32_t init_status;
52 ASSERT(descr && hw);
53 init_status = _usart_sync_init(&descr->device, hw);
54 if (init_status) {
55 return init_status;
56 }
57
58 descr->io.read = usart_sync_read;
59 descr->io.write = usart_sync_write;
60
61 return ERR_NONE;
62}
63
64/**
65 * \brief Uninitialize usart interface
66 */
67int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr)
68{
69 ASSERT(descr);
70 _usart_sync_deinit(&descr->device);
71
72 descr->io.read = NULL;
73 descr->io.write = NULL;
74
75 return ERR_NONE;
76}
77
78/**
79 * \brief Enable usart interface
80 */
81int32_t usart_sync_enable(struct usart_sync_descriptor *const descr)
82{
83 ASSERT(descr);
84 _usart_sync_enable(&descr->device);
85
86 return ERR_NONE;
87}
88
89/**
90 * \brief Disable usart interface
91 */
92int32_t usart_sync_disable(struct usart_sync_descriptor *const descr)
93{
94 ASSERT(descr);
95 _usart_sync_disable(&descr->device);
96
97 return ERR_NONE;
98}
99
100/**
101 * \brief Retrieve I/O descriptor
102 */
103int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io)
104{
105 ASSERT(descr && io);
106
107 *io = &descr->io;
108 return ERR_NONE;
109}
110
111/**
112 * \brief Specify action for flow control pins
113 */
114int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr,
115 const union usart_flow_control_state state)
116{
117 ASSERT(descr);
118 _usart_sync_set_flow_control_state(&descr->device, state);
119
120 return ERR_NONE;
121}
122
123/**
124 * \brief Set usart baud rate
125 */
126int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate)
127{
128 ASSERT(descr);
129 _usart_sync_set_baud_rate(&descr->device, baud_rate);
130
131 return ERR_NONE;
132}
133
134/**
135 * \brief Set usart data order
136 */
137int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order)
138{
139 ASSERT(descr);
140 _usart_sync_set_data_order(&descr->device, data_order);
141
142 return ERR_NONE;
143}
144
145/**
146 * \brief Set usart mode
147 */
148int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode)
149{
150 ASSERT(descr);
151 _usart_sync_set_mode(&descr->device, mode);
152
153 return ERR_NONE;
154}
155
156/**
157 * \brief Set usart parity
158 */
159int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity)
160{
161 ASSERT(descr);
162 _usart_sync_set_parity(&descr->device, parity);
163
164 return ERR_NONE;
165}
166
167/**
168 * \brief Set usart stop bits
169 */
170int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits)
171{
172 ASSERT(descr);
173 _usart_sync_set_stop_bits(&descr->device, stop_bits);
174
175 return ERR_NONE;
176}
177
178/**
179 * \brief Set usart character size
180 */
181int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size)
182{
183 ASSERT(descr);
184 _usart_sync_set_character_size(&descr->device, size);
185
186 return ERR_NONE;
187}
188
189/**
190 * \brief Retrieve the state of flow control pins
191 */
192int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr,
193 union usart_flow_control_state *const state)
194{
195 ASSERT(descr && state);
196 *state = _usart_sync_get_flow_control_state(&descr->device);
197
198 return ERR_NONE;
199}
200
201/**
202 * \brief Check if the usart transmitter is empty
203 */
204int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr)
205{
206 ASSERT(descr);
207 return _usart_sync_is_ready_to_send(&descr->device);
208}
209
210/**
211 * \brief Check if the usart receiver is not empty
212 */
213int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr)
214{
215 ASSERT(descr);
216 return _usart_sync_is_byte_received(&descr->device);
217}
218
219/**
220 * \brief Retrieve the current driver version
221 */
222uint32_t usart_sync_get_version(void)
223{
224 return DRIVER_VERSION;
225}
226
227/*
228 * \internal Write the given data to usart interface
229 *
230 * \param[in] descr The pointer to an io descriptor
231 * \param[in] buf Data to write to usart
232 * \param[in] length The number of bytes to write
233 *
234 * \return The number of bytes written.
235 */
236static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
237{
238 uint32_t offset = 0;
239 struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
240
241 ASSERT(io_descr && buf && length);
242 while (!_usart_sync_is_ready_to_send(&descr->device))
243 ;
244 do {
245 _usart_sync_write_byte(&descr->device, buf[offset]);
246 while (!_usart_sync_is_ready_to_send(&descr->device))
247 ;
248 } while (++offset < length);
249 while (!_usart_sync_is_transmit_done(&descr->device))
250 ;
251 return (int32_t)offset;
252}
253
254/*
255 * \internal Read data from usart interface
256 *
257 * \param[in] descr The pointer to an io descriptor
258 * \param[in] buf A buffer to read data to
259 * \param[in] length The size of a buffer
260 *
261 * \return The number of bytes read.
262 */
263static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
264{
265 uint32_t offset = 0;
266 struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
267
268 ASSERT(io_descr && buf && length);
269 do {
270 while (!_usart_sync_is_byte_received(&descr->device))
271 ;
272 buf[offset] = _usart_sync_read_byte(&descr->device);
273 } while (++offset < length);
274
275 return (int32_t)offset;
276}