Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /* Auto-generated config file hpl_osc32kctrl_config.h */ |
| 2 | #ifndef HPL_OSC32KCTRL_CONFIG_H |
| 3 | #define HPL_OSC32KCTRL_CONFIG_H |
| 4 | |
| 5 | // <<< Use Configuration Wizard in Context Menu >>> |
| 6 | |
| 7 | // <e> RTC Source configuration |
| 8 | // <id> enable_rtc_source |
| 9 | #ifndef CONF_RTCCTRL_CONFIG |
Harald Welte | bd5d3e4 | 2019-05-17 18:01:23 +0200 | [diff] [blame] | 10 | #define CONF_RTCCTRL_CONFIG 1 |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 11 | #endif |
| 12 | |
| 13 | // <h> RTC source control |
| 14 | // <y> RTC Clock Source Selection |
| 15 | // <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) |
| 16 | // <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) |
| 17 | // <i> This defines the clock source for RTC |
| 18 | // <id> rtc_source_oscillator |
| 19 | #ifndef CONF_RTCCTRL_SRC |
Kévin Redon | 87af489 | 2019-01-24 17:06:58 +0100 | [diff] [blame] | 20 | #define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 21 | #endif |
| 22 | |
| 23 | // <q> Use 1 kHz output |
| 24 | // <id> rtc_1khz_selection |
| 25 | #ifndef CONF_RTCCTRL_1KHZ |
| 26 | |
Harald Welte | bd5d3e4 | 2019-05-17 18:01:23 +0200 | [diff] [blame] | 27 | #define CONF_RTCCTRL_1KHZ 1 |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 28 | |
| 29 | #endif |
| 30 | |
| 31 | #if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K |
| 32 | #define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val) |
| 33 | #elif CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_XOSC32K |
| 34 | #define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val) |
| 35 | #else |
| 36 | #error unexpected CONF_RTCCTRL_SRC |
| 37 | #endif |
| 38 | |
| 39 | // </h> |
| 40 | // </e> |
| 41 | |
| 42 | // <e> 32kHz External Crystal Oscillator Configuration |
| 43 | // <i> Indicates whether configuration for External 32K Osc is enabled or not |
| 44 | // <id> enable_xosc32k |
| 45 | #ifndef CONF_XOSC32K_CONFIG |
| 46 | #define CONF_XOSC32K_CONFIG 1 |
| 47 | #endif |
| 48 | |
| 49 | // <h> 32kHz External Crystal Oscillator Control |
| 50 | // <q> Oscillator enable |
| 51 | // <i> Indicates whether 32kHz External Crystal Oscillator is enabled or not |
| 52 | // <id> xosc32k_arch_enable |
| 53 | #ifndef CONF_XOSC32K_ENABLE |
| 54 | #define CONF_XOSC32K_ENABLE 1 |
| 55 | #endif |
| 56 | |
| 57 | // <o> Start-Up Time |
| 58 | // <0x0=>62592us |
| 59 | // <0x1=>125092us |
| 60 | // <0x2=>500092us |
| 61 | // <0x3=>1000092us |
| 62 | // <0x4=>2000092us |
| 63 | // <0x5=>4000092us |
| 64 | // <0x6=>8000092us |
| 65 | // <id> xosc32k_arch_startup |
| 66 | #ifndef CONF_XOSC32K_STARTUP |
| 67 | #define CONF_XOSC32K_STARTUP 0x0 |
| 68 | #endif |
| 69 | |
| 70 | // <q> On Demand Control |
| 71 | // <i> Indicates whether On Demand Control is enabled or not |
| 72 | // <id> xosc32k_arch_ondemand |
| 73 | #ifndef CONF_XOSC32K_ONDEMAND |
Harald Welte | bd5d3e4 | 2019-05-17 18:01:23 +0200 | [diff] [blame] | 74 | #define CONF_XOSC32K_ONDEMAND 0 |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 75 | #endif |
| 76 | |
| 77 | // <q> Run in Standby |
| 78 | // <i> Indicates whether Run in Standby is enabled or not |
| 79 | // <id> xosc32k_arch_runstdby |
| 80 | #ifndef CONF_XOSC32K_RUNSTDBY |
Harald Welte | bd5d3e4 | 2019-05-17 18:01:23 +0200 | [diff] [blame] | 81 | #define CONF_XOSC32K_RUNSTDBY 1 |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 82 | #endif |
| 83 | |
| 84 | // <q> 1kHz Output Enable |
| 85 | // <i> Indicates whether 1kHz Output is enabled or not |
| 86 | // <id> xosc32k_arch_en1k |
| 87 | #ifndef CONF_XOSC32K_EN1K |
Harald Welte | bd5d3e4 | 2019-05-17 18:01:23 +0200 | [diff] [blame] | 88 | #define CONF_XOSC32K_EN1K 1 |
Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 89 | #endif |
| 90 | |
| 91 | // <q> 32kHz Output Enable |
| 92 | // <i> Indicates whether 32kHz Output is enabled or not |
| 93 | // <id> xosc32k_arch_en32k |
| 94 | #ifndef CONF_XOSC32K_EN32K |
| 95 | #define CONF_XOSC32K_EN32K 1 |
| 96 | #endif |
| 97 | |
| 98 | // <q> Clock Switch Back |
| 99 | // <i> Indicates whether Clock Switch Back is enabled or not |
| 100 | // <id> xosc32k_arch_swben |
| 101 | #ifndef CONF_XOSC32K_SWBEN |
| 102 | #define CONF_XOSC32K_SWBEN 0 |
| 103 | #endif |
| 104 | |
| 105 | // <q> Clock Failure Detector |
| 106 | // <i> Indicates whether Clock Failure Detector is enabled or not |
| 107 | // <id> xosc32k_arch_cfden |
| 108 | #ifndef CONF_XOSC32K_CFDEN |
| 109 | #define CONF_XOSC32K_CFDEN 0 |
| 110 | #endif |
| 111 | |
| 112 | // <q> Clock Failure Detector Event Out |
| 113 | // <i> Indicates whether Clock Failure Detector Event Out is enabled or not |
| 114 | // <id> xosc32k_arch_cfdeo |
| 115 | #ifndef CONF_XOSC32K_CFDEO |
| 116 | #define CONF_XOSC32K_CFDEO 0 |
| 117 | #endif |
| 118 | |
| 119 | // <q> Crystal connected to XIN32/XOUT32 Enable |
| 120 | // <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not |
| 121 | // <id> xosc32k_arch_xtalen |
| 122 | #ifndef CONF_XOSC32K_XTALEN |
| 123 | #define CONF_XOSC32K_XTALEN 1 |
| 124 | #endif |
| 125 | |
| 126 | // <o> Control Gain Mode |
| 127 | // <0x0=>Low Power mode |
| 128 | // <0x1=>Standard mode |
| 129 | // <0x2=>High Speed mode |
| 130 | // <id> xosc32k_arch_cgm |
| 131 | #ifndef CONF_XOSC32K_CGM |
| 132 | #define CONF_XOSC32K_CGM 0x1 |
| 133 | #endif |
| 134 | |
| 135 | // </h> |
| 136 | // </e> |
| 137 | |
| 138 | // <e> 32kHz Ultra Low Power Internal Oscillator Configuration |
| 139 | // <i> Indicates whether configuration for OSCULP32K is enabled or not |
| 140 | // <id> enable_osculp32k |
| 141 | #ifndef CONF_OSCULP32K_CONFIG |
| 142 | #define CONF_OSCULP32K_CONFIG 1 |
| 143 | #endif |
| 144 | |
| 145 | // <h> 32kHz Ultra Low Power Internal Oscillator Control |
| 146 | |
| 147 | // <q> Oscillator Calibration Control |
| 148 | // <i> Indicates whether Oscillator Calibration is enabled or not |
| 149 | // <id> osculp32k_calib_enable |
| 150 | #ifndef CONF_OSCULP32K_CALIB_ENABLE |
| 151 | #define CONF_OSCULP32K_CALIB_ENABLE 0 |
| 152 | #endif |
| 153 | |
| 154 | // <o> Oscillator Calibration <0x0-0x3F> |
| 155 | // <id> osculp32k_calib |
| 156 | #ifndef CONF_OSCULP32K_CALIB |
| 157 | #define CONF_OSCULP32K_CALIB 0x0 |
| 158 | #endif |
| 159 | |
| 160 | // </h> |
| 161 | // </e> |
| 162 | |
| 163 | // <<< end of configuration section >>> |
| 164 | |
| 165 | #endif // HPL_OSC32KCTRL_CONFIG_H |