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gerrit.osmocom.org / osmo-ccid-firmware / 0bc0d74e889fb6a378c0c813d05d2ec5ff9a739b / . / sysmoOCTSIM / CMSIS / Documentation / Core / html / index.html
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Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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6<title>Overview</title>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]7<title>CMSIS-Core (Cortex-M): Overview</title>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]8<link href="tabs.css" rel="stylesheet" type="text/css"/>
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33 <td style="padding-left: 0.5em;">
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]34 <div id="projectname">CMSIS-Core (Cortex-M)
35 &#160;<span id="projectnumber">Version 5.1.2</span>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]36 </div>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]37 <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]38 </td>
39 </tr>
40 </tbody>
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43<!-- end header part -->
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109<div class="header">
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111<div class="title">Overview </div> </div>
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113<div class="contents">
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]114<div class="textblock"><p>CMSIS-Core (Cortex-M) implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]115<ul>
116<li><b>Hardware Abstraction Layer (HAL)</b> for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.</li>
117<li><b>System exception names</b> to interface to system exceptions without having compatibility issues.</li>
118<li><b>Methods to organize header files</b> that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.</li>
119<li><b>Methods for system initialization</b> to be used by each MCU vendor. For example, the standardized <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a> function is essential for configuring the clock system of the device.</li>
120<li><b>Intrinsic functions</b> used to generate CPU instructions that are not supported by standard C functions.</li>
121<li>A variable to determine the <b>system clock frequency</b> which simplifies the setup the SysTick timer.</li>
122</ul>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]123<p>The following sections provide details about the CMSIS-Core (Cortex-M):</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]124<ul>
125<li><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]126<li><a class="el" href="using_TrustZone_pg.html">Using TrustZone&reg; for Armv8-M</a> describes how to use the security extensions available in the Armv8-M architecture.</li>
127<li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-Core (Cortex-M) in detail and explains how to adapt template files provided by Arm to silicon vendor devices.</li>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]128<li><a class="el" href="coreMISRA_Exceptions_pg.html">MISRA-C Deviations</a> describes the violations to the MISRA standard.</li>
129<li><a href="Modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
130<li><a href="Annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
131</ul>
132<hr/>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]133<h2>CMSIS-Core (Cortex-M) in ARM::CMSIS Pack </h2>
134<p>Files relevant to CMSIS-Core (Cortex-M) are present in the following <b>ARM::CMSIS</b> directories: </p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]135<table class="doxtable">
136<tr>
137<th>File/Folder </th><th>Content </th></tr>
138<tr>
139<td><b>CMSIS\Documentation\Core</b> </td><td>This documentation </td></tr>
140<tr>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]141<td><b>CMSIS\Core\Include</b> </td><td>CMSIS-Core (Cortex-M) header files (for example core_cm3.h, core_cmInstr.h, etc.) </td></tr>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]142<tr>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]143<td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">Arm reference implementations</a> of Cortex-M devices </td></tr>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]144<tr>
145<td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> for extension by silicon vendors </td></tr>
146</table>
147<hr/>
148<h1><a class="anchor" id="ref_v6-v8M"></a>
149Processor Support</h1>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]150<p>CMSIS supports the complete range of <a href="http://www.arm.com/products/processors/cortex-m/index.php" target="_blank"><b>Cortex-M processors</b></a> (with exception of Cortex-M1) and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>Armv8-M architecture</b></a> including security extensions.</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]151<h2><a class="anchor" id="ref_man_sec"></a>
152Cortex-M Reference Manuals</h2>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]153<p>The Cortex-M Device Generic User Guides contain the programmers model and detailed information about the core peripherals and are available for:</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]154<ul>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]155<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/DUI0497A_cortex_m0_r0p0_generic_ug.pdf" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
156<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/DUI0662B_cortex_m0p_r0p1_dgug.pdf" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
157<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]158<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf" target="_blank"><b>Cortex-M4 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]159<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]160</ul>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]161<p>The <b>Cortex-M23</b> and <b>Cortex-M33</b> are described with Technical Reference Manuals that are available here:</p>
162<ul>
163<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0550c/cortex_m23_r1p0_technical_reference_manual_DDI0550C_en.pdf" target="_blank"><b>Cortex-M23 Technical Reference Manual</b></a> (Armv8-M baseline architecture)</li>
164<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.100230_0002_00_en/cortex_m33_trm_100230_0002_00_en.pdf" target="_blank"><b>Cortex-M33 Technical Reference Manual</b></a> (Armv8-M mainline architecture)</li>
165</ul>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]166<h2><a class="anchor" id="ARMv8M"></a>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]167Armv8-M Architecture</h2>
168<p>Armv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both Armv8-M profiles are supported by CMSIS.</p>
169<p>The Armv8-M Architecture is described in the <a href="http://developer.arm.com/products/architecture/m-profile/docs/ddi0553/latest/armv8-m-architecture-reference-manual" target="_blank"><b>Armv8-M Architecture Reference Manual</b></a>.</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]170<hr/>
171<h1><a class="anchor" id="tested_tools_sec"></a>
172Tested and Verified Toolchains</h1>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]173<p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by Arm have been tested and verified with the following toolchains:</p>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]174<ul>
Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]175<li>Arm: Arm Compiler 5.06 update 6 (not for Cortex-M23, Cortex-M33, Armv8-M)</li>
176<li>Arm: Arm Compiler 6.9</li>
177<li>Arm: Arm Compiler 6.6.2 (not for Cortex-M0, Cortex-M23, Cortex-M33, Armv8-M)</li>
178<li>GNU: GNU Tools for Arm Embedded 6.3.1 20170620</li>
179<li>IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183</li>
Kévin Redon69b92d92019-01-24 16:39:20 +0100[diff] [blame]180</ul>
181<hr/>
182 </div></div><!-- contents -->
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Kévin Redon0bc0d742019-04-17 02:19:12 +0200[diff] [blame^]187 <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
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