| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief Instance description for PM |
| 5 | * |
| 6 | * Copyright (c) 2018 Microchip Technology Inc. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * SPDX-License-Identifier: Apache-2.0 |
| 13 | * |
| 14 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
| 15 | * not use this file except in compliance with the License. |
| 16 | * You may obtain a copy of the Licence at |
| 17 | * |
| 18 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 19 | * |
| 20 | * Unless required by applicable law or agreed to in writing, software |
| 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 23 | * See the License for the specific language governing permissions and |
| 24 | * limitations under the License. |
| 25 | * |
| 26 | * \asf_license_stop |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #ifndef _SAME54_PM_INSTANCE_ |
| 31 | #define _SAME54_PM_INSTANCE_ |
| 32 | |
| 33 | /* ========== Register definition for PM peripheral ========== */ |
| 34 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| 35 | #define REG_PM_CTRLA (0x40000400) /**< \brief (PM) Control A */ |
| 36 | #define REG_PM_SLEEPCFG (0x40000401) /**< \brief (PM) Sleep Configuration */ |
| 37 | #define REG_PM_INTENCLR (0x40000404) /**< \brief (PM) Interrupt Enable Clear */ |
| 38 | #define REG_PM_INTENSET (0x40000405) /**< \brief (PM) Interrupt Enable Set */ |
| 39 | #define REG_PM_INTFLAG (0x40000406) /**< \brief (PM) Interrupt Flag Status and Clear */ |
| 40 | #define REG_PM_STDBYCFG (0x40000408) /**< \brief (PM) Standby Configuration */ |
| 41 | #define REG_PM_HIBCFG (0x40000409) /**< \brief (PM) Hibernate Configuration */ |
| 42 | #define REG_PM_BKUPCFG (0x4000040A) /**< \brief (PM) Backup Configuration */ |
| 43 | #define REG_PM_PWSAKDLY (0x40000412) /**< \brief (PM) Power Switch Acknowledge Delay */ |
| 44 | #else |
| 45 | #define REG_PM_CTRLA (*(RwReg8 *)0x40000400UL) /**< \brief (PM) Control A */ |
| 46 | #define REG_PM_SLEEPCFG (*(RwReg8 *)0x40000401UL) /**< \brief (PM) Sleep Configuration */ |
| 47 | #define REG_PM_INTENCLR (*(RwReg8 *)0x40000404UL) /**< \brief (PM) Interrupt Enable Clear */ |
| 48 | #define REG_PM_INTENSET (*(RwReg8 *)0x40000405UL) /**< \brief (PM) Interrupt Enable Set */ |
| 49 | #define REG_PM_INTFLAG (*(RwReg8 *)0x40000406UL) /**< \brief (PM) Interrupt Flag Status and Clear */ |
| 50 | #define REG_PM_STDBYCFG (*(RwReg8 *)0x40000408UL) /**< \brief (PM) Standby Configuration */ |
| 51 | #define REG_PM_HIBCFG (*(RwReg8 *)0x40000409UL) /**< \brief (PM) Hibernate Configuration */ |
| 52 | #define REG_PM_BKUPCFG (*(RwReg8 *)0x4000040AUL) /**< \brief (PM) Backup Configuration */ |
| 53 | #define REG_PM_PWSAKDLY (*(RwReg8 *)0x40000412UL) /**< \brief (PM) Power Switch Acknowledge Delay */ |
| 54 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| 55 | |
| 56 | /* ========== Instance parameters for PM peripheral ========== */ |
| 57 | #define PM_PD_NUM 0 // Number of switchable Power Domains |
| 58 | |
| 59 | #endif /* _SAME54_PM_INSTANCE_ */ |