Update from Atmel START 1.0.87 to 1.1.134

Change-Id: I095f2f3f4de8ebba154b7d8f9f763a2fa6472ebd
diff --git a/sysmoOCTSIM/include/instance/sercom5.h b/sysmoOCTSIM/include/instance/sercom5.h
index a1fe75e..eaa937f 100644
--- a/sysmoOCTSIM/include/instance/sercom5.h
+++ b/sysmoOCTSIM/include/instance/sercom5.h
@@ -3,7 +3,7 @@
  *
  * \brief Instance description for SERCOM5
  *
- * Copyright (c) 2018 Microchip Technology Inc.
+ * Copyright (c) 2019 Microchip Technology Inc.

  *
  * \asf_license_start
  *
@@ -145,6 +145,18 @@
 #define SERCOM5_GCLK_ID_CORE        35      
 #define SERCOM5_GCLK_ID_SLOW        3       
 #define SERCOM5_INT_MSB             6       
+#define SERCOM5_I2CM                1        // I2C Master mode implemented?

+#define SERCOM5_I2CS                1        // I2C Slave mode implemented?

+#define SERCOM5_I2CS_AUTO_ACK       1        // I2C slave automatic acknowledge implemented?

+#define SERCOM5_I2CS_GROUP_CMD      1        // I2C slave group command implemented?

+#define SERCOM5_I2CS_SDASETUP_CNT_SIZE 8        // I2CS sda setup count size

+#define SERCOM5_I2CS_SDASETUP_SIZE  4        // I2CS sda setup size

+#define SERCOM5_I2CS_SUDAT          1        // I2C slave SDA setup implemented?

+#define SERCOM5_I2C_FASTMP          1        // I2C fast mode plus implemented?

+#define SERCOM5_I2C_HSMODE          1        // USART mode implemented?

+#define SERCOM5_I2C_SCLSM_MODE      1        // I2C SCL clock stretch mode implemented?

+#define SERCOM5_I2C_SMB_TIMEOUTS    1        // I2C SMBus timeouts implemented?

+#define SERCOM5_I2C_TENBIT_ADR      1        // I2C ten bit enabled?

 #define SERCOM5_PMSB                3       
 #define SERCOM5_RETENTION_SUPPORT   0        // Retention supported?
 #define SERCOM5_SE_CNT              1        // SE counter included?
@@ -154,18 +166,6 @@
 #define SERCOM5_SPI_OZMO            0        // OZMO features implemented?
 #define SERCOM5_SPI_WAKE_ON_SSL     1        // _SS low detect implemented?
 #define SERCOM5_TTBIT_EXTENSION     1        // 32-bit extension implemented?
-#define SERCOM5_TWIM                1        // TWI Master mode implemented?
-#define SERCOM5_TWIS                1        // TWI Slave mode implemented?
-#define SERCOM5_TWIS_AUTO_ACK       1        // TWI slave automatic acknowledge implemented?
-#define SERCOM5_TWIS_GROUP_CMD      1        // TWI slave group command implemented?
-#define SERCOM5_TWIS_SDASETUP_CNT_SIZE 8        // TWIS sda setup count size
-#define SERCOM5_TWIS_SDASETUP_SIZE  4        // TWIS sda setup size
-#define SERCOM5_TWIS_SUDAT          1        // TWI slave SDA setup implemented?
-#define SERCOM5_TWI_FASTMP          1        // TWI fast mode plus implemented?
-#define SERCOM5_TWI_HSMODE          1        // USART mode implemented?
-#define SERCOM5_TWI_SCLSM_MODE      1        // TWI SCL clock stretch mode implemented?
-#define SERCOM5_TWI_SMB_TIMEOUTS    1        // TWI SMBus timeouts implemented?
-#define SERCOM5_TWI_TENBIT_ADR      1        // TWI ten bit enabled?
 #define SERCOM5_USART               1        // USART mode implemented?
 #define SERCOM5_USART_AUTOBAUD      1        // USART autobaud implemented?
 #define SERCOM5_USART_COLDET        1        // USART collision detection implemented?