Update from Atmel START 1.0.87 to 1.1.134
Change-Id: I095f2f3f4de8ebba154b7d8f9f763a2fa6472ebd
diff --git a/sysmoOCTSIM/include/instance/evsys.h b/sysmoOCTSIM/include/instance/evsys.h
index 20d127f..0c25ff2 100644
--- a/sysmoOCTSIM/include/instance/evsys.h
+++ b/sysmoOCTSIM/include/instance/evsys.h
@@ -3,7 +3,7 @@
*
* \brief Instance description for EVSYS
*
- * Copyright (c) 2018 Microchip Technology Inc.
+ * Copyright (c) 2019 Microchip Technology Inc.
*
* \asf_license_start
*
@@ -572,65 +572,65 @@
#define EVSYS_ID_GEN_TCC0_OVF 41
#define EVSYS_ID_GEN_TCC0_TRG 42
#define EVSYS_ID_GEN_TCC0_CNT 43
-#define EVSYS_ID_GEN_TCC0_MCX_0 44
-#define EVSYS_ID_GEN_TCC0_MCX_1 45
-#define EVSYS_ID_GEN_TCC0_MCX_2 46
-#define EVSYS_ID_GEN_TCC0_MCX_3 47
-#define EVSYS_ID_GEN_TCC0_MCX_4 48
-#define EVSYS_ID_GEN_TCC0_MCX_5 49
+#define EVSYS_ID_GEN_TCC0_MC_0 44
+#define EVSYS_ID_GEN_TCC0_MC_1 45
+#define EVSYS_ID_GEN_TCC0_MC_2 46
+#define EVSYS_ID_GEN_TCC0_MC_3 47
+#define EVSYS_ID_GEN_TCC0_MC_4 48
+#define EVSYS_ID_GEN_TCC0_MC_5 49
#define EVSYS_ID_GEN_TCC1_OVF 50
#define EVSYS_ID_GEN_TCC1_TRG 51
#define EVSYS_ID_GEN_TCC1_CNT 52
-#define EVSYS_ID_GEN_TCC1_MCX_0 53
-#define EVSYS_ID_GEN_TCC1_MCX_1 54
-#define EVSYS_ID_GEN_TCC1_MCX_2 55
-#define EVSYS_ID_GEN_TCC1_MCX_3 56
+#define EVSYS_ID_GEN_TCC1_MC_0 53
+#define EVSYS_ID_GEN_TCC1_MC_1 54
+#define EVSYS_ID_GEN_TCC1_MC_2 55
+#define EVSYS_ID_GEN_TCC1_MC_3 56
#define EVSYS_ID_GEN_TCC2_OVF 57
#define EVSYS_ID_GEN_TCC2_TRG 58
#define EVSYS_ID_GEN_TCC2_CNT 59
-#define EVSYS_ID_GEN_TCC2_MCX_0 60
-#define EVSYS_ID_GEN_TCC2_MCX_1 61
-#define EVSYS_ID_GEN_TCC2_MCX_2 62
+#define EVSYS_ID_GEN_TCC2_MC_0 60
+#define EVSYS_ID_GEN_TCC2_MC_1 61
+#define EVSYS_ID_GEN_TCC2_MC_2 62
#define EVSYS_ID_GEN_TCC3_OVF 63
#define EVSYS_ID_GEN_TCC3_TRG 64
#define EVSYS_ID_GEN_TCC3_CNT 65
-#define EVSYS_ID_GEN_TCC3_MCX_0 66
-#define EVSYS_ID_GEN_TCC3_MCX_1 67
+#define EVSYS_ID_GEN_TCC3_MC_0 66
+#define EVSYS_ID_GEN_TCC3_MC_1 67
#define EVSYS_ID_GEN_TCC4_OVF 68
#define EVSYS_ID_GEN_TCC4_TRG 69
#define EVSYS_ID_GEN_TCC4_CNT 70
-#define EVSYS_ID_GEN_TCC4_MCX_0 71
-#define EVSYS_ID_GEN_TCC4_MCX_1 72
+#define EVSYS_ID_GEN_TCC4_MC_0 71
+#define EVSYS_ID_GEN_TCC4_MC_1 72
#define EVSYS_ID_GEN_TC0_OVF 73
-#define EVSYS_ID_GEN_TC0_MCX_0 74
-#define EVSYS_ID_GEN_TC0_MCX_1 75
+#define EVSYS_ID_GEN_TC0_MC_0 74
+#define EVSYS_ID_GEN_TC0_MC_1 75
#define EVSYS_ID_GEN_TC1_OVF 76
-#define EVSYS_ID_GEN_TC1_MCX_0 77
-#define EVSYS_ID_GEN_TC1_MCX_1 78
+#define EVSYS_ID_GEN_TC1_MC_0 77
+#define EVSYS_ID_GEN_TC1_MC_1 78
#define EVSYS_ID_GEN_TC2_OVF 79
-#define EVSYS_ID_GEN_TC2_MCX_0 80
-#define EVSYS_ID_GEN_TC2_MCX_1 81
+#define EVSYS_ID_GEN_TC2_MC_0 80
+#define EVSYS_ID_GEN_TC2_MC_1 81
#define EVSYS_ID_GEN_TC3_OVF 82
-#define EVSYS_ID_GEN_TC3_MCX_0 83
-#define EVSYS_ID_GEN_TC3_MCX_1 84
+#define EVSYS_ID_GEN_TC3_MC_0 83
+#define EVSYS_ID_GEN_TC3_MC_1 84
#define EVSYS_ID_GEN_TC4_OVF 85
-#define EVSYS_ID_GEN_TC4_MCX_0 86
-#define EVSYS_ID_GEN_TC4_MCX_1 87
+#define EVSYS_ID_GEN_TC4_MC_0 86
+#define EVSYS_ID_GEN_TC4_MC_1 87
#define EVSYS_ID_GEN_TC5_OVF 88
-#define EVSYS_ID_GEN_TC5_MCX_0 89
-#define EVSYS_ID_GEN_TC5_MCX_1 90
+#define EVSYS_ID_GEN_TC5_MC_0 89
+#define EVSYS_ID_GEN_TC5_MC_1 90
#define EVSYS_ID_GEN_TC6_OVF 91
-#define EVSYS_ID_GEN_TC6_MCX_0 92
-#define EVSYS_ID_GEN_TC6_MCX_1 93
+#define EVSYS_ID_GEN_TC6_MC_0 92
+#define EVSYS_ID_GEN_TC6_MC_1 93
#define EVSYS_ID_GEN_TC7_OVF 94
-#define EVSYS_ID_GEN_TC7_MCX_0 95
-#define EVSYS_ID_GEN_TC7_MCX_1 96
+#define EVSYS_ID_GEN_TC7_MC_0 95
+#define EVSYS_ID_GEN_TC7_MC_1 96
#define EVSYS_ID_GEN_PDEC_OVF 97
#define EVSYS_ID_GEN_PDEC_ERR 98
#define EVSYS_ID_GEN_PDEC_DIR 99
#define EVSYS_ID_GEN_PDEC_VLC 100
-#define EVSYS_ID_GEN_PDEC_MCX_0 101
-#define EVSYS_ID_GEN_PDEC_MCX_1 102
+#define EVSYS_ID_GEN_PDEC_MC_0 101
+#define EVSYS_ID_GEN_PDEC_MC_1 102
#define EVSYS_ID_GEN_ADC0_RESRDY 103
#define EVSYS_ID_GEN_ADC0_WINMON 104
#define EVSYS_ID_GEN_ADC1_RESRDY 105