Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 1 | |
| 2 | ==== Running test_idle_ready() |
| 3 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Allocated |
| 4 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 5 | Initial status: 0x00000000 |
| 6 | circuit 106/CTS (Clear to Send) is OFF (expected to be OFF) |
| 7 | circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF) |
| 8 | circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF) |
| 9 | osmo_v110_ta_frame_in(): all bits set to binary '1' |
| 10 | D-bits: 111111111111111111111111111111111111111111111111 |
| 11 | E-bits: 1111111 |
| 12 | S-bits: 111111111 |
| 13 | X-bits: 11 |
| 14 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event RX_FRAME_IND |
| 15 | v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111 |
| 16 | osmo_v110_ta_frame_in() returns 0 |
| 17 | osmo_v110_ta_frame_out(): expecting all bits set to binary '1' |
| 18 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event TX_FRAME_RTS |
| 19 | osmo_v110_ta_frame_out() returns 0 |
| 20 | D-bits: 111111111111111111111111111111111111111111111111 |
| 21 | E-bits: 1111111 |
| 22 | S-bits: 111111111 |
| 23 | X-bits: 11 |
| 24 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 25 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG |
| 26 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 27 | osmo_v110_ta_set_circuit() returns 0 |
| 28 | setting circuit 108/DTR (Data Terminal Ready) OFF |
| 29 | DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Received Event V24_STATUS_CHG |
| 30 | DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 31 | osmo_v110_ta_set_circuit() returns 0 |
| 32 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 33 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG |
| 34 | DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 35 | osmo_v110_ta_set_circuit() returns 0 |
| 36 | DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Deallocated |
| 37 | |
| 38 | ==== Running test_conn_ta_line() |
| 39 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Allocated |
| 40 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 41 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 42 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Received Event V24_STATUS_CHG |
| 43 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 44 | osmo_v110_ta_set_circuit() returns 0 |
| 45 | osmo_v110_ta_frame_out(): S-/X-bits are expected to be 1 (OFF) |
| 46 | osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1 |
| 47 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS |
| 48 | osmo_v110_ta_frame_out() returns 0 |
| 49 | D-bits: 111111111111111111111111111111111111111111111111 |
| 50 | E-bits: 1111111 |
| 51 | S-bits: 111111111 |
| 52 | X-bits: 11 |
| 53 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 54 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event SYNC_IND |
| 55 | osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON) |
| 56 | osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1 |
| 57 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS |
| 58 | osmo_v110_ta_frame_out() returns 0 |
| 59 | D-bits: 111111111111111111111111111111111111111111111111 |
| 60 | E-bits: 1111111 |
| 61 | S-bits: 000000000 |
| 62 | X-bits: 00 |
| 63 | osmo_v110_ta_frame_in(): S-/X-bits are OFF, expect no state change |
| 64 | D-bits: 010101010101010101010101010101010101010101010101 |
| 65 | E-bits: 0111111 |
| 66 | S-bits: 111111111 |
| 67 | X-bits: 11 |
| 68 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 69 | v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111 |
| 70 | osmo_v110_ta_frame_in() returns 0 |
| 71 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change |
| 72 | D-bits: 010101010101010101010101010101010101010101010101 |
| 73 | E-bits: 0111111 |
| 74 | S-bits: 000000000 |
| 75 | X-bits: 00 |
| 76 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 77 | v110_ta_test_status_update_cb(status=0x0000001e) |
| 78 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 79 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 80 | osmo_v110_ta_frame_in() returns 0 |
| 81 | DLGLOBAL DEBUG V110-TA(test_conn_ta_line){DATA_TRANSFER}: Deallocated |
| 82 | |
| 83 | ==== Running test_data_transfer() |
| 84 | DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Allocated |
| 85 | DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 86 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 87 | DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Received Event V24_STATUS_CHG |
| 88 | DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 89 | osmo_v110_ta_set_circuit() returns 0 |
| 90 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 91 | DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event SYNC_IND |
| 92 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change |
| 93 | D-bits: 010101010101010101010101010101010101010101010101 |
| 94 | E-bits: 0111111 |
| 95 | S-bits: 000000000 |
| 96 | X-bits: 00 |
| 97 | DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 98 | v110_ta_test_status_update_cb(status=0x0000001e) |
| 99 | DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 100 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 101 | osmo_v110_ta_frame_in() returns 0 |
| 102 | circuit 106/CTS (Clear to Send) is ON (expected to be ON) |
| 103 | circuit 107/DSR (Data Set Ready) is ON (expected to be ON) |
| 104 | circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON) |
| 105 | osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON) |
| 106 | osmo_v110_ta_frame_out(): E1..E3-bits are expected to be 011 (9600) |
| 107 | osmo_v110_ta_frame_out(): we also expect the .tx_cb() to be called |
| 108 | DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event TX_FRAME_RTS |
| 109 | v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 110 | osmo_v110_ta_frame_out() returns 0 |
| 111 | D-bits: 010101010101010101010101010101010101010101010101 |
| 112 | E-bits: 0111111 |
| 113 | S-bits: 000000000 |
| 114 | X-bits: 00 |
| 115 | osmo_v110_ta_frame_in(): feed that frame that we pulled out back into the TA |
| 116 | DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event RX_FRAME_IND |
| 117 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 118 | osmo_v110_ta_frame_in() returns 0 |
| 119 | DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Deallocated |
| 120 | |
| 121 | ==== Running test_data_transfer_disc_local() |
| 122 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Allocated |
| 123 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 124 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 125 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Received Event V24_STATUS_CHG |
| 126 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 127 | osmo_v110_ta_set_circuit() returns 0 |
| 128 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 129 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event SYNC_IND |
| 130 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change |
| 131 | D-bits: 010101010101010101010101010101010101010101010101 |
| 132 | E-bits: 0111111 |
| 133 | S-bits: 000000000 |
| 134 | X-bits: 00 |
| 135 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 136 | v110_ta_test_status_update_cb(status=0x0000001e) |
| 137 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 138 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 139 | osmo_v110_ta_frame_in() returns 0 |
| 140 | local TE initiates disconnection |
| 141 | setting circuit 108/DTR (Data Terminal Ready) OFF |
| 142 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: Received Event V24_STATUS_CHG |
| 143 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s) |
| 144 | v110_ta_test_status_update_cb(status=0x00000014) |
| 145 | osmo_v110_ta_set_circuit() returns 0 |
| 146 | osmo_v110_ta_frame_out(): S-bits are expected to be 1 (OFF) |
| 147 | osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON) |
| 148 | osmo_v110_ta_frame_out(): D-bits are all expected to be 0 |
| 149 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event TX_FRAME_RTS |
| 150 | osmo_v110_ta_frame_out() returns 0 |
| 151 | D-bits: 000000000000000000000000000000000000000000000000 |
| 152 | E-bits: 1111111 |
| 153 | S-bits: 111111111 |
| 154 | X-bits: 00 |
| 155 | circuit 106/CTS (Clear to Send) is OFF (expected to be OFF) |
| 156 | circuit 107/DSR (Data Set Ready) is ON (expected to be ON) |
| 157 | circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON) |
| 158 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect no state change |
| 159 | D-bits: 010101010101010101010101010101010101010101010101 |
| 160 | E-bits: 0111111 |
| 161 | S-bits: 000000000 |
| 162 | X-bits: 00 |
| 163 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND |
| 164 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 165 | osmo_v110_ta_frame_in() returns 0 |
| 166 | osmo_v110_ta_frame_in(): S-bits are OFF, expect state change |
| 167 | D-bits: 010101010101010101010101010101010101010101010101 |
| 168 | E-bits: 0111111 |
| 169 | S-bits: 111111111 |
| 170 | X-bits: 00 |
| 171 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND |
| 172 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: State change to IDLE_READY (no timeout) |
| 173 | v110_ta_test_status_update_cb(status=0x00000000) |
| 174 | v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111 |
| 175 | osmo_v110_ta_frame_in() returns 0 |
| 176 | circuit 106/CTS (Clear to Send) is OFF (expected to be OFF) |
| 177 | circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF) |
| 178 | circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF) |
| 179 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Deallocated |
| 180 | |
| 181 | ==== Running test_data_transfer_disc_remote() |
| 182 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Allocated |
| 183 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 184 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 185 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Received Event V24_STATUS_CHG |
| 186 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 187 | osmo_v110_ta_set_circuit() returns 0 |
| 188 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 189 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event SYNC_IND |
| 190 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change |
| 191 | D-bits: 010101010101010101010101010101010101010101010101 |
| 192 | E-bits: 0111111 |
| 193 | S-bits: 000000000 |
| 194 | X-bits: 00 |
| 195 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 196 | v110_ta_test_status_update_cb(status=0x0000001e) |
| 197 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 198 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 199 | osmo_v110_ta_frame_in() returns 0 |
| 200 | remote TE initiates disconnection |
| 201 | osmo_v110_ta_frame_in(): S-bits are OFF, X-bits are ON |
| 202 | osmo_v110_ta_frame_in(): D-bits are all set to 0 |
| 203 | D-bits: 000000000000000000000000000000000000000000000000 |
| 204 | E-bits: 0111111 |
| 205 | S-bits: 111111111 |
| 206 | X-bits: 00 |
| 207 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event RX_FRAME_IND |
| 208 | v110_ta_test_status_update_cb(status=0x0000000a) |
| 209 | osmo_v110_ta_frame_in() returns 0 |
| 210 | circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF) |
| 211 | circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF) |
| 212 | local TE confirms disconnection |
| 213 | setting circuit 108/DTR (Data Terminal Ready) OFF |
| 214 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event V24_STATUS_CHG |
| 215 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s) |
| 216 | v110_ta_test_status_update_cb(status=0x00000000) |
| 217 | osmo_v110_ta_set_circuit() returns 0 |
| 218 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: Received Event DESYNC_IND |
| 219 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 220 | circuit 106/CTS (Clear to Send) is OFF (expected to be OFF) |
| 221 | circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF) |
| 222 | circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF) |
| 223 | DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Deallocated |
| 224 | |
| 225 | ==== Running test_syncing() |
| 226 | DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Allocated |
| 227 | DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to IDLE_READY (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 228 | setting circuit 108/DTR (Data Terminal Ready) ON |
| 229 | DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Received Event V24_STATUS_CHG |
| 230 | DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s) |
| 231 | osmo_v110_ta_set_circuit() returns 0 |
| 232 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 233 | DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event SYNC_IND |
| 234 | osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change |
| 235 | D-bits: 010101010101010101010101010101010101010101010101 |
| 236 | E-bits: 0111111 |
| 237 | S-bits: 000000000 |
| 238 | X-bits: 00 |
| 239 | DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND |
| 240 | v110_ta_test_status_update_cb(status=0x0000001e) |
| 241 | DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 242 | v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 243 | osmo_v110_ta_frame_in() returns 0 |
| 244 | osmo_v110_ta_sync_ind(): the lower layer indicates out-of-sync event |
| 245 | DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event DESYNC_IND |
| 246 | DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: State change to RESYNCING (X1, 3s) |
| 247 | osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON) |
| 248 | osmo_v110_ta_frame_out(): X-bits are expected to be 1 (OFF) |
| 249 | osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb() |
| 250 | DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event TX_FRAME_RTS |
| 251 | v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 252 | osmo_v110_ta_frame_out() returns 0 |
| 253 | D-bits: 010101010101010101010101010101010101010101010101 |
| 254 | E-bits: 0111111 |
| 255 | S-bits: 000000000 |
| 256 | X-bits: 11 |
| 257 | osmo_v110_ta_sync_ind(): the lower layer indicates sync event |
| 258 | DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event SYNC_IND |
| 259 | DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: State change to DATA_TRANSFER (no timeout) |
Vadim Yanitskiy | 85554db | 2023-03-14 20:33:51 +0100 | [diff] [blame] | 260 | osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON) |
| 261 | osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON) |
| 262 | osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb() |
| 263 | DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event TX_FRAME_RTS |
| 264 | v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101 |
| 265 | osmo_v110_ta_frame_out() returns 0 |
| 266 | D-bits: 010101010101010101010101010101010101010101010101 |
| 267 | E-bits: 0111111 |
| 268 | S-bits: 000000000 |
| 269 | X-bits: 00 |
| 270 | DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Deallocated |