blob: 38f643fcc13180576f8f8853a8fc48bad6d30e08 [file] [log] [blame]
Roman Khassraf059bab92015-05-20 12:49:46 +02001/*
2* Copyright 2008 Free Software Foundation, Inc.
3*
4* This software is distributed under the terms of the GNU Public License.
5* See the COPYING file in the main directory for details.
6
7 This program is free software: you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation, either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20*/
21
22
23
24#include "GSM610Tables.h"
25
26
27/*
28RFC 3551 RTP A/V Profile July 2003
29
30
31 Octet Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
32 _____________________________________________________________________
33 0 1 1 0 1 LARc0.0 LARc0.1 LARc0.2 LARc0.3
34 1 LARc0.4 LARc0.5 LARc1.0 LARc1.1 LARc1.2 LARc1.3 LARc1.4 LARc1.5
35 2 LARc2.0 LARc2.1 LARc2.2 LARc2.3 LARc2.4 LARc3.0 LARc3.1 LARc3.2
36 3 LARc3.3 LARc3.4 LARc4.0 LARc4.1 LARc4.2 LARc4.3 LARc5.0 LARc5.1
37 4 LARc5.2 LARc5.3 LARc6.0 LARc6.1 LARc6.2 LARc7.0 LARc7.1 LARc7.2
38 5 Nc0.0 Nc0.1 Nc0.2 Nc0.3 Nc0.4 Nc0.5 Nc0.6 bc0.0
39 6 bc0.1 Mc0.0 Mc0.1 xmaxc00 xmaxc01 xmaxc02 xmaxc03 xmaxc04
40 7 xmaxc05 xmc0.0 xmc0.1 xmc0.2 xmc1.0 xmc1.1 xmc1.2 xmc2.0
41 8 xmc2.1 xmc2.2 xmc3.0 xmc3.1 xmc3.2 xmc4.0 xmc4.1 xmc4.2
42 9 xmc5.0 xmc5.1 xmc5.2 xmc6.0 xmc6.1 xmc6.2 xmc7.0 xmc7.1
43 10 xmc7.2 xmc8.0 xmc8.1 xmc8.2 xmc9.0 xmc9.1 xmc9.2 xmc10.0
44 11 xmc10.1 xmc10.2 xmc11.0 xmc11.1 xmc11.2 xmc12.0 xmc12.1 xcm12.2
45 12 Nc1.0 Nc1.1 Nc1.2 Nc1.3 Nc1.4 Nc1.5 Nc1.6 bc1.0
46 13 bc1.1 Mc1.0 Mc1.1 xmaxc10 xmaxc11 xmaxc12 xmaxc13 xmaxc14
47 14 xmax15 xmc13.0 xmc13.1 xmc13.2 xmc14.0 xmc14.1 xmc14.2 xmc15.0
48 15 xmc15.1 xmc15.2 xmc16.0 xmc16.1 xmc16.2 xmc17.0 xmc17.1 xmc17.2
49 16 xmc18.0 xmc18.1 xmc18.2 xmc19.0 xmc19.1 xmc19.2 xmc20.0 xmc20.1
50 17 xmc20.2 xmc21.0 xmc21.1 xmc21.2 xmc22.0 xmc22.1 xmc22.2 xmc23.0
51 18 xmc23.1 xmc23.2 xmc24.0 xmc24.1 xmc24.2 xmc25.0 xmc25.1 xmc25.2
52 19 Nc2.0 Nc2.1 Nc2.2 Nc2.3 Nc2.4 Nc2.5 Nc2.6 bc2.0
53 20 bc2.1 Mc2.0 Mc2.1 xmaxc20 xmaxc21 xmaxc22 xmaxc23 xmaxc24
54 21 xmaxc25 xmc26.0 xmc26.1 xmc26.2 xmc27.0 xmc27.1 xmc27.2 xmc28.0
55 22 xmc28.1 xmc28.2 xmc29.0 xmc29.1 xmc29.2 xmc30.0 xmc30.1 xmc30.2
56 23 xmc31.0 xmc31.1 xmc31.2 xmc32.0 xmc32.1 xmc32.2 xmc33.0 xmc33.1
57 24 xmc33.2 xmc34.0 xmc34.1 xmc34.2 xmc35.0 xmc35.1 xmc35.2 xmc36.0
58 25 Xmc36.1 xmc36.2 xmc37.0 xmc37.1 xmc37.2 xmc38.0 xmc38.1 xmc38.2
59 26 Nc3.0 Nc3.1 Nc3.2 Nc3.3 Nc3.4 Nc3.5 Nc3.6 bc3.0
60 27 bc3.1 Mc3.0 Mc3.1 xmaxc30 xmaxc31 xmaxc32 xmaxc33 xmaxc34
61 28 xmaxc35 xmc39.0 xmc39.1 xmc39.2 xmc40.0 xmc40.1 xmc40.2 xmc41.0
62 29 xmc41.1 xmc41.2 xmc42.0 xmc42.1 xmc42.2 xmc43.0 xmc43.1 xmc43.2
63 30 xmc44.0 xmc44.1 xmc44.2 xmc45.0 xmc45.1 xmc45.2 xmc46.0 xmc46.1
64 31 xmc46.2 xmc47.0 xmc47.1 xmc47.2 xmc48.0 xmc48.1 xmc48.2 xmc49.0
65 32 xmc49.1 xmc49.2 xmc50.0 xmc50.1 xmc50.2 xmc51.0 xmc51.1 xmc51.2
66
67 Table 3: GSM payload format
68*/
69
70
71/*
72 This file encodes a mapping between
73 GSM 05.03 Table 2 and RFC-3551 Table 3.
74*/
75
76/*
77 Naming convention:
78 xxx_p position (bit index)
79 xxx_l length (bit field length)
80 LAR log area ratio
81 N LTP lag
82 b LTP gain
83 M grid
84 Xmax block amplitude
85 x RPE pulses
86*/
87
88
89/**@name Lengths of GSM 06.10 fields */
90//@{
91const unsigned int LAR1_l=6; ///< log area ratio
92const unsigned int LAR2_l=6; ///< log area ratio
93const unsigned int LAR3_l=5; ///< log area ratio
94const unsigned int LAR4_l=5; ///< log area ratio
95const unsigned int LAR5_l=4; ///< log area ratio
96const unsigned int LAR6_l=4; ///< log area ratio
97const unsigned int LAR7_l=3; ///< log area ratio
98const unsigned int LAR8_l=3; ///< log area ratio
99const unsigned int N_l=7; ///< LTP lag
100const unsigned int b_l=2; ///< LTP gain
101const unsigned int M_l=2; ///< grid position
102const unsigned int Xmax_l=6; ///< block amplitude
103const unsigned int x_l=3; ///< RPE pulses
104//@}
105
106
107
108/*@name Indecies of GSM 06.10 fields as they appear in RFC-3551 Table 3. */
109//@{
110
111/**@name Log area ratios, apply to whole frame. */
112//@{
113const unsigned int LAR1_p = 0;
114const unsigned int LAR2_p = LAR1_p + LAR1_l;
115const unsigned int LAR3_p = LAR2_p + LAR2_l;
116const unsigned int LAR4_p = LAR3_p + LAR3_l;
117const unsigned int LAR5_p = LAR4_p + LAR4_l;
118const unsigned int LAR6_p = LAR5_p + LAR5_l;
119const unsigned int LAR7_p = LAR6_p + LAR6_l;
120const unsigned int LAR8_p = LAR7_p + LAR7_l;
121//@}
122/**@name Subframe 1 */
123//@{
124const unsigned int N1_p = LAR8_p + LAR8_l;
125const unsigned int b1_p = N1_p + N_l;
126const unsigned int M1_p = b1_p + b_l;
127const unsigned int Xmax1_p = M1_p + M_l;
128const unsigned int x1_0_p = Xmax1_p + Xmax_l;
129const unsigned int x1_1_p = x1_0_p + x_l;
130const unsigned int x1_2_p = x1_1_p + x_l;
131const unsigned int x1_3_p = x1_2_p + x_l;
132const unsigned int x1_4_p = x1_3_p + x_l;
133const unsigned int x1_5_p = x1_4_p + x_l;
134const unsigned int x1_6_p = x1_5_p + x_l;
135const unsigned int x1_7_p = x1_6_p + x_l;
136const unsigned int x1_8_p = x1_7_p + x_l;
137const unsigned int x1_9_p = x1_8_p + x_l;
138const unsigned int x1_10_p = x1_9_p + x_l;
139const unsigned int x1_11_p = x1_10_p + x_l;
140const unsigned int x1_12_p = x1_11_p + x_l;
141//@}
142/**@name Subframe 2 */
143//@{
144const unsigned int N2_p = x1_12_p + x_l;
145const unsigned int b2_p = N2_p + N_l;
146const unsigned int M2_p = b2_p + b_l;
147const unsigned int Xmax2_p = M2_p + M_l;
148const unsigned int x2_0_p = Xmax2_p + Xmax_l;
149const unsigned int x2_1_p = x2_0_p + x_l;
150const unsigned int x2_2_p = x2_1_p + x_l;
151const unsigned int x2_3_p = x2_2_p + x_l;
152const unsigned int x2_4_p = x2_3_p + x_l;
153const unsigned int x2_5_p = x2_4_p + x_l;
154const unsigned int x2_6_p = x2_5_p + x_l;
155const unsigned int x2_7_p = x2_6_p + x_l;
156const unsigned int x2_8_p = x2_7_p + x_l;
157const unsigned int x2_9_p = x2_8_p + x_l;
158const unsigned int x2_10_p = x2_9_p + x_l;
159const unsigned int x2_11_p = x2_10_p + x_l;
160const unsigned int x2_12_p = x2_11_p + x_l;
161//@}
162/**@mame Subframe 3 */
163//@{
164const unsigned int N3_p = x2_12_p + x_l;
165const unsigned int b3_p = N3_p + N_l;
166const unsigned int M3_p = b3_p + b_l;
167const unsigned int Xmax3_p = M3_p + M_l;
168const unsigned int x3_0_p = Xmax3_p + Xmax_l;
169const unsigned int x3_1_p = x3_0_p + x_l;
170const unsigned int x3_2_p = x3_1_p + x_l;
171const unsigned int x3_3_p = x3_2_p + x_l;
172const unsigned int x3_4_p = x3_3_p + x_l;
173const unsigned int x3_5_p = x3_4_p + x_l;
174const unsigned int x3_6_p = x3_5_p + x_l;
175const unsigned int x3_7_p = x3_6_p + x_l;
176const unsigned int x3_8_p = x3_7_p + x_l;
177const unsigned int x3_9_p = x3_8_p + x_l;
178const unsigned int x3_10_p = x3_9_p + x_l;
179const unsigned int x3_11_p = x3_10_p + x_l;
180const unsigned int x3_12_p = x3_11_p + x_l;
181//@}
182/**@name Subframe 4 */
183//@{
184const unsigned int N4_p = x3_12_p + x_l;
185const unsigned int b4_p = N4_p + N_l;
186const unsigned int M4_p = b4_p + b_l;
187const unsigned int Xmax4_p = M4_p + M_l;
188const unsigned int x4_0_p = Xmax4_p + Xmax_l;
189const unsigned int x4_1_p = x4_0_p + x_l;
190const unsigned int x4_2_p = x4_1_p + x_l;
191const unsigned int x4_3_p = x4_2_p + x_l;
192const unsigned int x4_4_p = x4_3_p + x_l;
193const unsigned int x4_5_p = x4_4_p + x_l;
194const unsigned int x4_6_p = x4_5_p + x_l;
195const unsigned int x4_7_p = x4_6_p + x_l;
196const unsigned int x4_8_p = x4_7_p + x_l;
197const unsigned int x4_9_p = x4_8_p + x_l;
198const unsigned int x4_10_p = x4_9_p + x_l;
199const unsigned int x4_11_p = x4_10_p + x_l;
200const unsigned int x4_12_p = x4_11_p + x_l;
201//@}
202//@}
203
204
205/*
206 This array encodes GSM 05.03 Table 2.
207 It's also GSM 06.10 Table A2.1a.
208 This is the order of bits as they appear in
209 the d[] bits of the GSM TCH/F.
210 RTP[4+g610BitOrder[i]] <=> GSM[i]
211*/
212unsigned int GSM::g610BitOrder[260] = {
213/**@name importance class 1 */
214//@{
215/** LAR1:5 */ LAR1_p+LAR1_l-1-5, /* bit 0 */
216/** Xmax1:5 */ Xmax1_p+Xmax_l-1-5,
217/** Xmax2:5 */ Xmax2_p+Xmax_l-1-5,
218/** Xmax3:5 */ Xmax3_p+Xmax_l-1-5,
219/** Xmax4:5 */ Xmax4_p+Xmax_l-1-5,
220//@}
221/**@name importance class 2 */
222//@{
223/** LAR1:4 */ LAR1_p+LAR1_l-1-4,
224/** LAR2:5 */ LAR2_p+LAR2_l-1-5,
225/** LAR3:4 */ LAR3_p+LAR3_l-1-4,
226//@}
227/**@name importance class 3 */
228//@{
229/** LAR1:3 */ LAR1_p+LAR1_l-1-3,
230/** LAR2:4 */ LAR2_p+LAR2_l-1-4,
231/** LAR3:3 */ LAR3_p+LAR3_l-1-3, /* bit 10 */
232/** LAR4:4 */ LAR4_p+LAR4_l-1-4,
233/** N1:6 */ N1_p+N_l-1-6,
234/** N2:6 */ N2_p+N_l-1-6,
235/** N3:6 */ N3_p+N_l-1-6,
236/** N4:6 */ N4_p+N_l-1-6,
237/** Xmax1:4 */ Xmax1_p+Xmax_l-1-4,
238/** Xmax2:4 */ Xmax2_p+Xmax_l-1-4,
239/** Xmax3:4 */ Xmax3_p+Xmax_l-1-4,
240/** Xmax4:4 */ Xmax4_p+Xmax_l-1-4,
241/** LAR2:3 */ LAR2_p+LAR2_l-1-3, /* bit 20 */
242/** LAR5:3 */ LAR5_p+LAR5_l-1-3,
243/** LAR6:3 */ LAR6_p+LAR6_l-1-3,
244/** N1:5 */ N1_p+N_l-1-5,
245/** N2:5 */ N2_p+N_l-1-5,
246/** N3:5 */ N3_p+N_l-1-5,
247/** N4:5 */ N4_p+N_l-1-5,
248/** N1:4 */ N1_p+N_l-1-4,
249/** N2:4 */ N2_p+N_l-1-4,
250/** N3:4 */ N3_p+N_l-1-4,
251/** N4:4 */ N4_p+N_l-1-4, /* bit 30 */
252/** N1:3 */ N1_p+N_l-1-3,
253/** N2:3 */ N2_p+N_l-1-3,
254/** N3:3 */ N3_p+N_l-1-3,
255/** N4:3 */ N4_p+N_l-1-3,
256/** N1:2 */ N1_p+N_l-1-2,
257/** N2:2 */ N2_p+N_l-1-2,
258/** N3:2 */ N3_p+N_l-1-2,
259/** N4:2 */ N4_p+N_l-1-2,
260//@}
261/**@name importance class 4 */
262//@{
263/** Xmax1:3 */ Xmax1_p+Xmax_l-1-3,
264/** Xmax2:3 */ Xmax2_p+Xmax_l-1-3, /* bit 40 */
265/** Xmax3:3 */ Xmax3_p+Xmax_l-1-3,
266/** Xmax4:3 */ Xmax4_p+Xmax_l-1-3,
267/** LAR1:2 */ LAR1_p+LAR1_l-1-2,
268/** LAR4:3 */ LAR4_p+LAR4_l-1-3,
269/** LAR7:2 */ LAR7_p+LAR7_l-1-2,
270/** N1:1 */ N1_p+N_l-1-1,
271/** N2:1 */ N2_p+N_l-1-1,
272/** N3:1 */ N3_p+N_l-1-1,
273/** N4:1 */ N4_p+N_l-1-1,
274/** LAR5:2 */ LAR5_p+LAR5_l-1-2, /* bit 50 */
275/** LAR6:2 */ LAR6_p+LAR6_l-1-2,
276/** b1:1 */ b1_p+b_l-1-1,
277/** b2:1 */ b2_p+b_l-1-1,
278/** b3:1 */ b3_p+b_l-1-1,
279/** b4:1 */ b4_p+b_l-1-1,
280/** N1:0 */ N1_p+N_l-1-0,
281/** N2:0 */ N2_p+N_l-1-0,
282/** N3:0 */ N3_p+N_l-1-0,
283/** N4:0 */ N4_p+N_l-1-0,
284/** M1:1 */ M1_p+M_l-1-1, /* bit 60 */
285/** M2:1 */ M2_p+M_l-1-1,
286/** M3:1 */ M3_p+M_l-1-1,
287/** M4:1 */ M4_p+M_l-1-1,
288//@}
289/**@name importance class 5 */
290//@{
291/** LAR1:1 */ LAR1_p+LAR1_l-1-1,
292/** LAR2:2 */ LAR2_p+LAR2_l-1-2,
293/** LAR3:2 */ LAR3_p+LAR3_l-1-2,
294/** LAR8:2 */ LAR8_p+LAR8_l-1-2,
295/** LAR4:2 */ LAR4_p+LAR4_l-1-2,
296/** LAR5:1 */ LAR5_p+LAR5_l-1-1,
297/** LAR7:1 */ LAR7_p+LAR7_l-1-1, /* bit 70 */
298/** b1:0 */ b1_p+b_l-1-0,
299/** b2:0 */ b2_p+b_l-1-0,
300/** b3:0 */ b3_p+b_l-1-0,
301/** b4:0 */ b4_p+b_l-1-0,
302/** Xmax1:2 */ Xmax1_p+Xmax_l-1-2,
303/** Xmax2:2 */ Xmax2_p+Xmax_l-1-2,
304/** Xmax3:2 */ Xmax3_p+Xmax_l-1-2,
305/** Xmax4:2 */ Xmax4_p+Xmax_l-1-2,
306/** x1_0:2 */ x1_0_p+x_l-1-2,
307/** x1_1:2 */ x1_1_p+x_l-1-2, /* bit 80 */
308/** x1_2:2 */ x1_2_p+x_l-1-2,
309/** x1_3:2 */ x1_3_p+x_l-1-2,
310/** x1_4:2 */ x1_4_p+x_l-1-2,
311/** x1_5:2 */ x1_5_p+x_l-1-2,
312/** x1_6:2 */ x1_6_p+x_l-1-2,
313/** x1_7:2 */ x1_7_p+x_l-1-2,
314/** x1_8:2 */ x1_8_p+x_l-1-2,
315/** x1_9:2 */ x1_9_p+x_l-1-2,
316/** x1_10:2 */ x1_10_p+x_l-1-2,
317/** x1_11:2 */ x1_11_p+x_l-1-2, /* bit 90 */
318/** x1_12:2 */ x1_12_p+x_l-1-2,
319/** x2_0:2 */ x2_0_p+x_l-1-2,
320/** x2_1:2 */ x2_1_p+x_l-1-2,
321/** x2_2:2 */ x2_2_p+x_l-1-2,
322/** x2_3:2 */ x2_3_p+x_l-1-2,
323/** x2_4:2 */ x2_4_p+x_l-1-2,
324/** x2_5:2 */ x2_5_p+x_l-1-2,
325/** x2_6:2 */ x2_6_p+x_l-1-2,
326/** x2_7:2 */ x2_7_p+x_l-1-2,
327/** x2_8:2 */ x2_8_p+x_l-1-2, /* bit 100 */
328/** x2_9:2 */ x2_9_p+x_l-1-2,
329/** x2_10:2 */ x2_10_p+x_l-1-2,
330/** x2_11:2 */ x2_11_p+x_l-1-2,
331/** x2_12:2 */ x2_12_p+x_l-1-2,
332/** x3_0:2 */ x3_0_p+x_l-1-2,
333/** x3_1:2 */ x3_1_p+x_l-1-2,
334/** x3_2:2 */ x3_2_p+x_l-1-2,
335/** x3_3:2 */ x3_3_p+x_l-1-2,
336/** x3_4:2 */ x3_4_p+x_l-1-2,
337/** x3_5:2 */ x3_5_p+x_l-1-2, /* bit 110 */
338/** x3_6:2 */ x3_6_p+x_l-1-2,
339/** x3_7:2 */ x3_7_p+x_l-1-2,
340/** x3_8:2 */ x3_8_p+x_l-1-2,
341/** x3_9:2 */ x3_9_p+x_l-1-2,
342/** x3_10:2 */ x3_10_p+x_l-1-2,
343/** x3_11:2 */ x3_11_p+x_l-1-2,
344/** x3_12:2 */ x3_12_p+x_l-1-2,
345/** x4_0:2 */ x4_0_p+x_l-1-2,
346/** x4_1:2 */ x4_1_p+x_l-1-2,
347/** x4_2:2 */ x4_2_p+x_l-1-2, /* bit 120 */
348/** x4_3:2 */ x4_3_p+x_l-1-2,
349/** x4_4:2 */ x4_4_p+x_l-1-2,
350/** x4_5:2 */ x4_5_p+x_l-1-2,
351/** x4_6:2 */ x4_6_p+x_l-1-2,
352/** x4_7:2 */ x4_7_p+x_l-1-2,
353/** x4_8:2 */ x4_8_p+x_l-1-2,
354/** x4_9:2 */ x4_9_p+x_l-1-2,
355/** x4_10:2 */ x4_10_p+x_l-1-2,
356/** x4_11:2 */ x4_11_p+x_l-1-2,
357/** x4_12:2 */ x4_12_p+x_l-1-2, /* bit 130 */
358/** M1:0 */ M1_p+M_l-1-0,
359/** M2:0 */ M2_p+M_l-1-0,
360/** M3:0 */ M3_p+M_l-1-0,
361/** M4:0 */ M4_p+M_l-1-0,
362/** Xmax1:1 */ Xmax1_p+Xmax_l-1-1,
363/** Xmax2:1 */ Xmax2_p+Xmax_l-1-1,
364/** Xmax3:1 */ Xmax3_p+Xmax_l-1-1,
365/** Xmax4:1 */ Xmax4_p+Xmax_l-1-1,
366/** x1_0:1 */ x1_0_p+x_l-1-1,
367/** x1_1:1 */ x1_1_p+x_l-1-1, /* bit 140 */
368/** x1_2:1 */ x1_2_p+x_l-1-1,
369/** x1_3:1 */ x1_3_p+x_l-1-1,
370/** x1_4:1 */ x1_4_p+x_l-1-1,
371/** x1_5:1 */ x1_5_p+x_l-1-1,
372/** x1_6:1 */ x1_6_p+x_l-1-1,
373/** x1_7:1 */ x1_7_p+x_l-1-1,
374/** x1_8:1 */ x1_8_p+x_l-1-1,
375/** x1_9:1 */ x1_9_p+x_l-1-1,
376/** x1_10:1 */ x1_10_p+x_l-1-1,
377/** x1_11:1 */ x1_11_p+x_l-1-1, /* bit 150 */
378/** x1_12:1 */ x1_12_p+x_l-1-1,
379/** x2_0:1 */ x2_0_p+x_l-1-1,
380/** x2_1:1 */ x2_1_p+x_l-1-1,
381/** x2_2:1 */ x2_2_p+x_l-1-1,
382/** x2_3:1 */ x2_3_p+x_l-1-1,
383/** x2_4:1 */ x2_4_p+x_l-1-1,
384/** x2_5:1 */ x2_5_p+x_l-1-1,
385/** x2_6:1 */ x2_6_p+x_l-1-1,
386/** x2_7:1 */ x2_7_p+x_l-1-1,
387/** x2_8:1 */ x2_8_p+x_l-1-1, /* bit 160 */
388/** x2_9:1 */ x2_9_p+x_l-1-1,
389/** x2_10:1 */ x2_10_p+x_l-1-1,
390/** x2_11:1 */ x2_11_p+x_l-1-1,
391/** x2_12:1 */ x2_12_p+x_l-1-1,
392/** x3_0:1 */ x3_0_p+x_l-1-1,
393/** x3_1:1 */ x3_1_p+x_l-1-1,
394/** x3_2:1 */ x3_2_p+x_l-1-1,
395/** x3_3:1 */ x3_3_p+x_l-1-1,
396/** x3_4:1 */ x3_4_p+x_l-1-1,
397/** x3_5:1 */ x3_5_p+x_l-1-1, /* bit 170 */
398/** x3_6:1 */ x3_6_p+x_l-1-1,
399/** x3_7:1 */ x3_7_p+x_l-1-1,
400/** x3_8:1 */ x3_8_p+x_l-1-1,
401/** x3_9:1 */ x3_9_p+x_l-1-1,
402/** x3_10:1 */ x3_10_p+x_l-1-1,
403/** x3_11:1 */ x3_11_p+x_l-1-1,
404/** x3_12:1 */ x3_12_p+x_l-1-1,
405/** x4_0:1 */ x4_0_p+x_l-1-1,
406/** x4_1:1 */ x4_1_p+x_l-1-1,
407/** x4_2:1 */ x4_2_p+x_l-1-1, /* bit 180 */
408/** x4_3:1 */ x4_3_p+x_l-1-1,
409//@}
410/**@name importance class 6 */
411//@{
412/** x4_4:1 */ x4_4_p+x_l-1-1,
413/** x4_5:1 */ x4_5_p+x_l-1-1,
414/** x4_6:1 */ x4_6_p+x_l-1-1,
415/** x4_7:1 */ x4_7_p+x_l-1-1,
416/** x4_8:1 */ x4_8_p+x_l-1-1,
417/** x4_9:1 */ x4_9_p+x_l-1-1,
418/** x4_10:1 */ x4_10_p+x_l-1-1,
419/** x4_11:1 */ x4_11_p+x_l-1-1,
420/** x4_12:1 */ x4_12_p+x_l-1-1, /* bit 190 */
421/** LAR1:0 */ LAR1_p+LAR1_l-1-0,
422/** LAR2:1 */ LAR2_p+LAR2_l-1-1,
423/** LAR3:1 */ LAR3_p+LAR3_l-1-1,
424/** LAR6:1 */ LAR6_p+LAR6_l-1-1,
425/** LAR7:0 */ LAR7_p+LAR7_l-1-0,
426/** LAR8:1 */ LAR8_p+LAR8_l-1-1,
427/** LAR8:0 */ LAR8_p+LAR8_l-1-0,
428/** LAR3:0 */ LAR3_p+LAR3_l-1-0,
429/** LAR4:1 */ LAR4_p+LAR4_l-1-1,
430/** LAR4:0 */ LAR4_p+LAR4_l-1-0,
431/** LAR5:0 */ LAR5_p+LAR5_l-1-0,
432/** Xmax1:0 */ Xmax1_p+Xmax_l-1-0,
433/** Xmax2:0 */ Xmax2_p+Xmax_l-1-0,
434/** Xmax3:0 */ Xmax3_p+Xmax_l-1-0,
435/** Xmax4:0 */ Xmax4_p+Xmax_l-1-0,
436/** x1_0:0 */ x1_0_p+x_l-1-0,
437/** x1_1:0 */ x1_1_p+x_l-1-0,
438/** x1_2:0 */ x1_2_p+x_l-1-0,
439/** x1_3:0 */ x1_3_p+x_l-1-0,
440/** x1_4:0 */ x1_4_p+x_l-1-0,
441/** x1_5:0 */ x1_5_p+x_l-1-0,
442/** x1_6:0 */ x1_6_p+x_l-1-0,
443/** x1_7:0 */ x1_7_p+x_l-1-0,
444/** x1_8:0 */ x1_8_p+x_l-1-0,
445/** x1_9:0 */ x1_9_p+x_l-1-0,
446/** x1_10:0 */ x1_10_p+x_l-1-0,
447/** x1_11:0 */ x1_11_p+x_l-1-0,
448/** x1_12:0 */ x1_12_p+x_l-1-0,
449/** x2_0:0 */ x2_0_p+x_l-1-0,
450/** x2_1:0 */ x2_1_p+x_l-1-0,
451/** x2_2:0 */ x2_2_p+x_l-1-0,
452/** x2_3:0 */ x2_3_p+x_l-1-0,
453/** x2_4:0 */ x2_4_p+x_l-1-0,
454/** x2_5:0 */ x2_5_p+x_l-1-0,
455/** x2_6:0 */ x2_6_p+x_l-1-0,
456/** x2_7:0 */ x2_7_p+x_l-1-0,
457/** x2_8:0 */ x2_8_p+x_l-1-0,
458/** x2_9:0 */ x2_9_p+x_l-1-0,
459/** x2_10:0 */ x2_10_p+x_l-1-0,
460/** x2_11:0 */ x2_11_p+x_l-1-0,
461/** x2_12:0 */ x2_12_p+x_l-1-0,
462/** x3_0:0 */ x3_0_p+x_l-1-0,
463/** x3_1:0 */ x3_1_p+x_l-1-0,
464/** x3_2:0 */ x3_2_p+x_l-1-0,
465/** x3_3:0 */ x3_3_p+x_l-1-0,
466/** x3_4:0 */ x3_4_p+x_l-1-0,
467/** x3_5:0 */ x3_5_p+x_l-1-0,
468/** x3_6:0 */ x3_6_p+x_l-1-0,
469/** x3_7:0 */ x3_7_p+x_l-1-0,
470/** x3_8:0 */ x3_8_p+x_l-1-0,
471/** x3_9:0 */ x3_9_p+x_l-1-0,
472/** x3_10:0 */ x3_10_p+x_l-1-0,
473/** x3_11:0 */ x3_11_p+x_l-1-0,
474/** x3_12:0 */ x3_12_p+x_l-1-0,
475/** x4_0:0 */ x4_0_p+x_l-1-0,
476/** x4_1:0 */ x4_1_p+x_l-1-0,
477/** x4_2:0 */ x4_2_p+x_l-1-0,
478/** x4_3:0 */ x4_3_p+x_l-1-0,
479/** x4_4:0 */ x4_4_p+x_l-1-0,
480/** x4_5:0 */ x4_5_p+x_l-1-0,
481/** x4_6:0 */ x4_6_p+x_l-1-0,
482/** x4_7:0 */ x4_7_p+x_l-1-0,
483/** x4_8:0 */ x4_8_p+x_l-1-0,
484/** x4_9:0 */ x4_9_p+x_l-1-0,
485/** x4_10:0 */ x4_10_p+x_l-1-0,
486/** x4_11:0 */ x4_11_p+x_l-1-0,
487/** x4_12:0 */ x4_12_p+x_l-1-0,
488/** LAR2:0 */ LAR2_p+LAR2_l-1-0,
489/** LAR6:0 */ LAR6_p+LAR6_l-1-0
490//@}
491};
492