commit 172c28eba812f62cfff5c168f438a7cfd45308c0
author Harald Welte <laforge@osmocom.org> Mon Jul 10 22:20:40 2023 +0200
committer Harald Welte <laforge@osmocom.org> Wed Jul 12 22:05:14 2023 +0200
tree 4571dc7b6a5d334956f4486b17c3f88d0fd4777f
parent b314b9be3480fa0b226ef2601e005840ac4e68b4

cards: All derived of SimCardBase use CLA=A0; all UiccCardBase use CLA=00

Change-Id: Id61b549f68410631529349ee62b08a102f609405

pySim/cards.py

diff --git a/pySim/cards.py b/pySim/cards.py
index 3acc7aa..d720413 100644
--- a/pySim/cards.py
+++ b/pySim/cards.py
@@ -83,6 +83,10 @@
     any higher-layer processing."""
     name = 'SIM'
 
+    def __init__(self, scc: LinkBase):
+        super(SimCardBase, self).__init__(scc)
+        self._scc.cla_byte = "A0"
+
     def probe(self) -> bool:
         df_gsm = DF_GSM()
         return self.file_exists(df_gsm.fid)
@@ -93,7 +97,8 @@
 
     def __init__(self, ssc: LinkBase):
         super(UiccCardBase, self).__init__(ssc)
-	    # See also: ETSI TS 102 221, Table 9.3
+        self._scc.cla_byte = "00"
+        # See also: ETSI TS 102 221, Table 9.3
         self._adm_chv_num = 0xA0
 
     def probe(self) -> bool: