diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index ebda8a4..54d1f5f 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -1,110 +1,110 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='45' failures='12' errors='1' skipped='0' inconc='0' time='230.00'>
-  <testcase classname='MSC_Tests' name='TC_cr_before_reset' time='4.016365'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='1.103294'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='1.095196'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_reject' time='6.089528'>
+<testsuite name='Titan' tests='45' failures='12' errors='1' skipped='0' inconc='0' time='MASKED'>
+  <testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1832 MSC_Tests control part
-      MSC_Tests.ttcn:502 TC_lu_imsi_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_lu_imsi_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_gsup' time='11.115838'>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_gsup' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1833 MSC_Tests control part
-      MSC_Tests.ttcn:531 TC_lu_imsi_timeout_gsup testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_lu_imsi_timeout_gsup testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi' time='1.332147'/>
-  <testcase classname='MSC_Tests' name='TC_cmserv_imsi_unknown' time='1.072018'/>
-  <testcase classname='MSC_Tests' name='TC_lu_and_mo_call' time='4.363851'/>
-  <testcase classname='MSC_Tests' name='TC_lu_auth_sai_timeout' time='6.104096'/>
-  <testcase classname='MSC_Tests' name='TC_lu_auth_sai_err' time='1.095694'/>
-  <testcase classname='MSC_Tests' name='TC_lu_clear_request' time='2.092570'>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_cmserv_imsi_unknown' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mo_call' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_auth_sai_timeout' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_auth_sai_err' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_clear_request' time='MASKED'>
     <failure type='fail-verdict'>Got a second Clear Command, only one expected
-      MSC_Tests.ttcn:1839 MSC_Tests control part
-      MSC_Tests.ttcn:704 TC_lu_clear_request testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_lu_clear_request testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_lu_disconnect' time='2.072759'/>
-  <testcase classname='MSC_Tests' name='TC_lu_by_imei' time='6.269669'/>
-  <testcase classname='MSC_Tests' name='TC_lu_by_tmsi_noauth_unknown' time='1.305121'/>
-  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imsi' time='1.266751'/>
-  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_tmsi' time='1.303229'/>
-  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imei' time='1.277434'/>
-  <testcase classname='MSC_Tests' name='TC_emerg_call_imei_reject' time='6.099546'>
+  <testcase classname='MSC_Tests' name='TC_lu_disconnect' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_by_imei' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_by_tmsi_noauth_unknown' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_tmsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imei' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_emerg_call_imei_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1846 MSC_Tests control part
-      MSC_Tests.ttcn:909 TC_emerg_call_imei_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_emerg_call_imei_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_emerg_call_imsi' time='4.352641'/>
-  <testcase classname='MSC_Tests' name='TC_cm_serv_req_vgcs_reject' time='6.294919'>
+  <testcase classname='MSC_Tests' name='TC_emerg_call_imsi' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_cm_serv_req_vgcs_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1848 MSC_Tests control part
-      MSC_Tests.ttcn:946 TC_cm_serv_req_vgcs_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_cm_serv_req_vgcs_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_cm_serv_req_vbs_reject' time='6.298783'>
+  <testcase classname='MSC_Tests' name='TC_cm_serv_req_vbs_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1849 MSC_Tests control part
-      MSC_Tests.ttcn:967 TC_cm_serv_req_vbs_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_cm_serv_req_vbs_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_cm_serv_req_lcs_reject' time='6.324982'>
+  <testcase classname='MSC_Tests' name='TC_cm_serv_req_lcs_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1850 MSC_Tests control part
-      MSC_Tests.ttcn:988 TC_cm_serv_req_lcs_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_cm_serv_req_lcs_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_cm_reest_req_reject' time='6.316325'>
+  <testcase classname='MSC_Tests' name='TC_cm_reest_req_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1851 MSC_Tests control part
-      MSC_Tests.ttcn:1009 TC_cm_reest_req_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_cm_reest_req_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_lu_auth_2G_fail' time='1.323815'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_13' time='1.284995'/>
-  <testcase classname='MSC_Tests' name='TC_cl3_no_payload' time='1.091612'/>
-  <testcase classname='MSC_Tests' name='TC_cl3_rnd_payload' time='6.027316'>
+  <testcase classname='MSC_Tests' name='TC_lu_auth_2G_fail' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_13' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_cl3_no_payload' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_cl3_rnd_payload' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand or SCCP Release
-      MSC_Tests.ttcn:1855 MSC_Tests control part
-      MSC_Tests.ttcn:1131 TC_cl3_rnd_payload testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_cl3_rnd_payload testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_establish_and_nothing' time='6.309272'>
+  <testcase classname='MSC_Tests' name='TC_establish_and_nothing' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1856 MSC_Tests control part
-      MSC_Tests.ttcn:1148 TC_establish_and_nothing testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_establish_and_nothing testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='31.570211'>
+  <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
-      MSC_Tests.ttcn:1857 MSC_Tests control part
-      MSC_Tests.ttcn:1172 TC_mo_setup_and_nothing testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_mo_setup_and_nothing testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_timeout' time='5.327838'/>
-  <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_reject' time='1.344745'/>
-  <testcase classname='MSC_Tests' name='TC_mt_crcx_ran_reject' time='31.111087'>
+  <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_timeout' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_reject' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_mt_crcx_ran_reject' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for channel release
-      MSC_Tests.ttcn:1860 MSC_Tests control part
-      MSC_Tests.ttcn:1383 TC_mt_crcx_ran_reject testcase
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
+      MSC_Tests.ttcn:MASKED TC_mt_crcx_ran_reject testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_mo_setup_and_dtmf_dup' time='2.732785'/>
-  <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='1.330964'>
+  <testcase classname='MSC_Tests' name='TC_mo_setup_and_dtmf_dup' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='MASKED'>
     <error type='DTE'></error>
   </testcase>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_1_13' time='1.133688'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_13' time='1.115280'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1' time='1.071593'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_no_cm' time='1.111861'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_2' time='1.103937'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_013_2' time='1.115820'/>
-  <testcase classname='MSC_Tests' name='TC_mo_release_timeout' time='25.326450'/>
-  <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='10.357978'/>
-  <testcase classname='MSC_Tests' name='TC_reset_two' time='3.038000'/>
-  <testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='4.395712'/>
-  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='1.124996'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_1_13' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_13' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_no_cm' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_2' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_013_2' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_mo_release_timeout' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
 </testsuite>