update expected-results.xml files
Change-Id: Idcf764cd2d251210bb123d2a5ea782cda0d670b7
diff --git a/pcu/expected-results.xml b/pcu/expected-results.xml
index 11906d9..dc5aa31 100644
--- a/pcu/expected-results.xml
+++ b/pcu/expected-results.xml
@@ -1,11 +1,20 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='70' failures='3' errors='1' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='99' failures='4' errors='0' skipped='0' inconc='0' time='MASKED'>
<testcase classname='PCU_Tests' name='TC_pcuif_suspend' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_pcuif_suspend_active_tbf' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_ta_ptcch_idle' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_ta_rach_imm_ass' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_ta_ul_ack_nack_first_block' time='MASKED'>
+ <failure type='fail-verdict'>Timing Advance mismatch: expected 2, but received 0
+ PCU_Tests.ttcn:MASKED PCU_Tests control part
+ PCU_Tests.ttcn:MASKED TC_ta_ul_ack_nack_first_block testcase
+ </failure>
+ </testcase>
<testcase classname='PCU_Tests' name='TC_ta_idle_dl_tbf_ass' time='MASKED'>
- <error type='DTE'></error>
+ <failure type='fail-verdict'>Timing Advance value doesn't match
+ PCU_Tests.ttcn:MASKED PCU_Tests control part
+ PCU_Tests.ttcn:MASKED TC_ta_idle_dl_tbf_ass testcase
+ </failure>
</testcase>
<testcase classname='PCU_Tests' name='TC_ta_ptcch_ul_multi_tbf' time='MASKED'>
<failure type='fail-verdict'>Failed to match Timing Advance Index for #0
@@ -23,8 +32,13 @@
<testcase classname='PCU_Tests' name='TC_mcs_max_ul' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_mcs_initial_dl' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_mcs_max_dl' time='MASKED'/>
- <testcase classname='PCU_Tests' name='TC_t3169' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_t3141' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_n3101_max_t3169' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_n3103_max_t3169' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_x2031_t3191' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_zero_x2031_t3191' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_t3193' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_n3105_max_t3195' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_countdown_procedure' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_ul_all_sizes' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_ul_data_toolong_fills_padding' time='MASKED'/>
@@ -37,6 +51,7 @@
<testcase classname='PCU_Tests' name='TC_imm_ass_dl_block_retrans' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_dl_flow_more_blocks' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_ul_flow_multiple_llc_blocks' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_dl_no_ack_retrans_imm_ass' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_paging_cs_from_bts' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_paging_cs_from_sgsn_sign_ptmsi' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_paging_cs_from_sgsn_sign' time='MASKED'/>
@@ -71,14 +86,31 @@
</failure>
</testcase>
<testcase classname='PCU_Tests' name='TC_dl_multislot_tbf_ms_class_from_2phase' time='MASKED'/>
- <testcase classname='PCU_Tests' name='TC_ul_multislot_tbf_ms_class_from_2phase' time='MASKED'>
- <failure type='fail-verdict'>Expected 8 PDCH slot allocated but got 1
- PCU_Tests.ttcn:MASKED PCU_Tests control part
- PCU_Tests.ttcn:MASKED TC_ul_multislot_tbf_ms_class_from_2phase testcase
- </failure>
- </testcase>
+ <testcase classname='PCU_Tests' name='TC_ul_multislot_tbf_ms_class_from_2phase' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_multiplex_dl_gprs_egprs' time='MASKED'/>
<testcase classname='PCU_Tests' name='TC_pcuif_info_ind_subsequent' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_success' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_success_no_ctrl_ack' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_success_twice' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_success_twice_nocache' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_rac_ci_resolve_conn_refused' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_rac_ci_resolve_timeout' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_rac_ci_resolve_fail_parse_response' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_si_resolve_timeout' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_dup' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_dup2' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_dup3' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_dup4' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_dup5' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_twice' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_twice2' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_twice3' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_twice4' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_twice5' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_nacc_outbound_pkt_cell_chg_notif_unassigned_dl_tbf' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_rim_ran_info_req_single_rep' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_rim_ran_info_req_single_rep_eutran' time='MASKED'/>
+ <testcase classname='PCU_Tests' name='TC_rim_ran_info_req_single_rep_no_si' time='MASKED'/>
<testcase classname='PCU_Tests_NS' name='TC_ns_reset' time='MASKED'/>
<testcase classname='PCU_Tests_NS' name='TC_ns_reset_retrans' time='MASKED'/>
<testcase classname='PCU_Tests_NS' name='TC_ns_alive' time='MASKED'/>