diff --git a/bsc/expected-results.xml b/bsc/expected-results.xml
index e266660..1d4f5d7 100644
--- a/bsc/expected-results.xml
+++ b/bsc/expected-results.xml
@@ -1,9 +1,8 @@
 <?xml version="1.0"?>
-<testsuite name='BSC_Tests' tests='107' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='BSC_Tests' tests='163' failures='11' errors='1' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='BSC_Tests' name='TC_ctrl_msc_connection_status' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_ctrl_msc0_connection_status' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_ctrl' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_ctrl_location' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_chan_act_noreply' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_chan_act_counter' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_chan_act_ack_noest' time='MASKED'/>
@@ -38,6 +37,23 @@
   <testcase classname='BSC_Tests' name='TC_assignment_codec_efr' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S1' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S1' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S124' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S124' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S02' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S024' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0247' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S0' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S02' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S024' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S0247' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S01234567' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0234567' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_zero' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_unsupp' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S7' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_assignment_codec_fr_exhausted_req_hr' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_assignment_codec_fr_exhausted_req_fr' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_assignment_codec_fr_exhausted_req_fr_hr' time='MASKED'/>
@@ -94,6 +110,13 @@
   <testcase classname='BSC_Tests' name='TC_ho_in_fail_msc_clears_after_ho_detect' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_ho_in_fail_no_detect' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_ho_in_fail_no_detect2' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_1' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_2' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_3' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_4' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_5' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_6' time='MASKED'/>
+  <testcase classname='BSC_Tests' name='TC_ho_neighbor_config_7' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_bssap_rlsd_does_not_cause_bssmap_reset' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_bssmap_clear_does_not_cause_bssmap_reset' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_ms_rel_ind_does_not_cause_bssmap_reset' time='MASKED'/>
@@ -106,23 +129,6 @@
   <testcase classname='BSC_Tests' name='TC_assignment_verify_ms_power_params_ie' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_early_conn_fail' time='MASKED'/>
   <testcase classname='BSC_Tests' name='TC_late_conn_fail' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S1' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S1' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S124' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S124' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S02' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S024' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0247' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S0' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S02' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S024' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S0247' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S01234567' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_S0234567' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_zero' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_f_unsupp' time='MASKED'/>
-  <testcase classname='BSC_Tests' name='TC_assignment_codec_amr_h_S7' time='MASKED'/>
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_gcr_only' time='MASKED'/>
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_gcr_bway_connect' time='MASKED'/>
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_gcr_bway_connect_hr' time='MASKED'/>
@@ -137,4 +143,81 @@
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_bts_gcr_bway_connect' time='MASKED'/>
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_bts_gcr_bway_connect_hr' time='MASKED'/>
   <testcase classname='BSC_Tests_LCLS' name='TC_lcls_bts_connect_break' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_bsc_server' time='MASKED'>
+    <failure type='fail-verdict'>Could not connect to CBSP port, check your configuration
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_bsc_server testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_bsc_client' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_reset_bss' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_bss' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_bss testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_bts_cgi' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_bts_cgi testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_bts_no_cbch' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_unknown_bts' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_lac_ci' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_lac_ci testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_ci' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_ci testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_lai' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_lai testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_lac' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_lac testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_then_replace' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_then_replace testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_replace_nonexist' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_too_many' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_kill_nonexist' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_then_kill' time='MASKED'>
+    <error type='DTE'>Dynamic test case error: Performing lengthof() operation on a template of type @CBSP_Types.CBSP_IEs with no exact length.</error>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_write_then_reset' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected CBSP
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_write_then_reset testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_emerg_write_bts_cgi_dchan' time='MASKED'/>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_emerg_write_bts_cgi_cchan' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected OSMO_ETWS_CMD
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_emerg_write_bts_cgi_cchan testcase
+    </failure>
+  </testcase>
+  <testcase classname='BSC_Tests_CBSP' name='TC_cbsp_emerg_write_bts_cgi_cchan_disable' time='MASKED'>
+    <failure type='fail-verdict'>Received unexpected OSMO_ETWS_CMD
+      BSC_Tests_CBSP.ttcn:MASKED BSC_Tests_CBSP control part
+      BSC_Tests_CBSP.ttcn:MASKED TC_cbsp_emerg_write_bts_cgi_cchan_disable testcase
+    </failure>
+  </testcase>
 </testsuite>
diff --git a/bts/expected-results.xml b/bts/expected-results.xml
index 7d89da3..a03e16b 100644
--- a/bts/expected-results.xml
+++ b/bts/expected-results.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='88' failures='5' errors='0' skipped='1' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='156' failures='18' errors='1' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='BTS_Tests' name='TC_chan_act_stress' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_chan_act_react' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_chan_deact_not_active' time='MASKED'/>
@@ -9,9 +9,36 @@
   <testcase classname='BTS_Tests' name='TC_sacch_info_mod' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_sacch_multi' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_sacch_multi_chg' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_sacch_chan_act' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_sacch_chan_act_ho_async' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Unexpected RSL message received"
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_sacch_chan_act_ho_async testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_sacch_chan_act_ho_sync' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Unexpected RSL message received"
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_sacch_chan_act_ho_sync testcase
+    </failure>
+  </testcase>
   <testcase classname='BTS_Tests' name='TC_rach_content' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_rach_count' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_rach_max_ta' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_ho_rach' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rach_load_idle_thresh0' time='MASKED'>
+    <failure type='fail-verdict'>Unexpected RACH LOAD IND: { streamId := IPAC_PROTO_RSL_TRX0 (0), rsl := { msg_disc := { msg_group := RSL_MDISC_CCHAN (6), transparent := false }, msg_type := RSL_MT_CCCH_LOAD_IND (18), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { ch0 := RSL_CHAN_NR_RACH (17) }, tn := 0 } } }, { iei := RSL_IE_RACH_LOAD (18), body := { rach_load := { len := 6, slot_count := 0, busy_count := 0, access_count := 0 } } } } } }
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_rach_load_idle_thresh0 testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_rach_load_idle_below_thresh' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rach_load_count' time='MASKED'>
+    <failure type='fail-verdict'>Unexpected RACH LOAD IND: { streamId := IPAC_PROTO_RSL_TRX0 (0), rsl := { msg_disc := { msg_group := RSL_MDISC_CCHAN (6), transparent := false }, msg_type := RSL_MT_CCCH_LOAD_IND (18), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { ch0 := RSL_CHAN_NR_RACH (17) }, tn := 0 } } }, { iei := RSL_IE_RACH_LOAD (18), body := { rach_load := { len := 6, slot_count := 0, busy_count := 0, access_count := 0 } } } } } }
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_rach_load_count testcase
+    </failure>
+  </testcase>
   <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchf' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh' time='MASKED'>
     <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { lm := { tag := '0001'B, sub_chan := 0 } }, tn := 5 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 1 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
@@ -19,25 +46,38 @@
       BTS_Tests.ttcn:MASKED TC_meas_res_sign_tchh testcase
     </failure>
   </testcase>
-  <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch4' time='MASKED'>
-    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { sdcch4 := { tag := '001'B, sub_chan := 0 } }, tn := 0 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 14 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 7, reserved1 := '00'B, rxlev_s_u := 7, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
-      BTS_Tests.ttcn:MASKED BTS_Tests control part
-      BTS_Tests.ttcn:MASKED TC_meas_res_sign_sdcch4 testcase
-    </failure>
-  </testcase>
-  <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch8' time='MASKED'>
-    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { sdcch8 := { tag := '01'B, sub_chan := 0 } }, tn := 6 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 14 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 7, reserved1 := '00'B, rxlev_s_u := 7, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
-      BTS_Tests.ttcn:MASKED BTS_Tests control part
-      BTS_Tests.ttcn:MASKED TC_meas_res_sign_sdcch8 testcase
-    </failure>
-  </testcase>
+  <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch4' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_meas_res_sign_sdcch8' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_meas_res_sign_tchh_toa256' time='MASKED'>
-    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received unspecific MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { lm := { tag := '0001'B, sub_chan := 0 } }, tn := 5 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 1 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 11, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 7, rxq_s_u := 7, supp_meas_info := { toa256_mean := 512, toa256_min := 512, toa256_max := 512, toa256_std_dev := 0 } } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 6, payload := '061539390000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+    <error type='DTE'></error>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_rsl_bs_pwr_static_ass' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received wrong BS power level in MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { ch0 := RSL_CHAN_NR_Bm_ACCH (1) }, tn := 1 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 0 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 0, rxq_s_u := 0, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 18, payload := '0615363601C0000000000000000000000000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
       BTS_Tests.ttcn:MASKED BTS_Tests control part
-      BTS_Tests.ttcn:MASKED TC_meas_res_sign_tchh_toa256 testcase
+      BTS_Tests.ttcn:MASKED TC_rsl_bs_pwr_static_ass testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_rsl_bs_pwr_static_power_control' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Received wrong BS power level in MEAS RES { msg_disc := { msg_group := RSL_MDISC_DCHAN (4), transparent := false }, msg_type := RSL_MT_MEAS_RES (40), ies := { { iei := RSL_IE_CHAN_NR (1), body := { chan_nr := { u := { ch0 := RSL_CHAN_NR_Bm_ACCH (1) }, tn := 1 } } }, { iei := RSL_IE_MEAS_RES_NR (27), body := { meas_res_nr := 0 } }, { iei := RSL_IE_UPLINK_MEAS (25), body := { uplink_meas := { len := 3, rfu := '0'B, dtx_d := false, rxlev_f_u := 10, reserved1 := '00'B, rxlev_s_u := 10, reserved2 := '00'B, rxq_f_u := 0, rxq_s_u := 0, supp_meas_info := omit } } }, { iei := RSL_IE_BS_POWER (4), body := { bs_power := { reserved := 0, epc := false, fpc := false, power_level := 0 } } }, { iei := RSL_IE_L1_INFO (10), body := { l1_info := { ms_power_lvl := 7, fpc := false, reserved := 0, actual_ta := 0 } } }, { iei := RSL_IE_L3_INFO (11), body := { l3_info := { len := 18, payload := '0615363601C0000000000000000000000000'O } } }, { iei := RSL_IE_MS_TIMING_OFFSET (37), body := { ms_timing_offset := 65 } } } }"
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_rsl_bs_pwr_static_power_control testcase
     </failure>
   </testcase>
   <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_ctrl' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_active' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_active2' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_up' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_down' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_ass_updown' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_ms_pwr_dyn_max' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_chan_initial_ms_pwr' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_chan_initial_ta' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_rsl_modify_encr' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : BTS shouldn't be able to decrypt after key change"
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_rsl_modify_encr testcase
+    </failure>
+  </testcase>
   <testcase classname='BTS_Tests' name='TC_conn_fail_crit' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_paging_imsi_80percent' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_paging_tmsi_80percent' time='MASKED'/>
@@ -66,28 +106,56 @@
   <testcase classname='BTS_Tests' name='TC_pcu_deact_req' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_deact_req_wrong_ts' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_ver_si13' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_bts' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_trx' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_wrong_ts' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_ts_inactive' time='MASKED'>
-    <skipped>no verdict</skipped>
-  </testcase>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_pdtch' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_pcu_data_req_ptcch' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_ptcch' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_data_req_agch' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_data_req_pch' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_data_req_imm_ass_pch' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_rach_content' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_ext_rach_content' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_data_ind_lqual_cb' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_pcu_paging_from_rsl' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_time_ind' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_rts_req' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_oml_alert' time='MASKED'>
+    <failure type='fail-verdict'>Could not connect IPA socket from "" port 0 to "127.0.0.1" port 4249; check your configuration
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_pcu_oml_alert testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_pcu_rr_suspend' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_connect_multi' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_reconnect' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_noconnect_nosi3gprs' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_noconnect_nosi4gprs' time='MASKED'>
+    <failure type='fail-verdict'>SYSTEM_INFORMATION_TYPE_4 (28) indicates GPRS even before PCU socket connected
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_pcu_socket_noconnect_nosi4gprs testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_connect_si3gprs' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_connect_si4gprs' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_disconnect_nosi3gprs' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_disconnect_nosi4gprs' time='MASKED'>
+    <failure type='fail-verdict'>SYSTEM_INFORMATION_TYPE_4 (28) indicates GPRS after PCU socket disconnected
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_pcu_socket_disconnect_nosi4gprs testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests' name='TC_pcu_socket_verify_info_ind' time='MASKED'>
+    <failure type='fail-verdict'>Expected cell_id '23' and got '0'. This either means, that the BTS is sending the wrong cell_id, or that the BTS sent it too early (OS#4179)
+      BTS_Tests.ttcn:MASKED BTS_Tests control part
+      BTS_Tests.ttcn:MASKED TC_pcu_socket_verify_info_ind testcase
+    </failure>
+  </testcase>
   <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_act_deact' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_unsol_deact' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_double_act' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_deact' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_tchf_act_nack' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_unsol_deact' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_tchf_act' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_dyn_osmo_pdch_tchh_act' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_deact' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_tchf_act' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_tchf_act_pdch_act_nack' time='MASKED'/>
-  <testcase classname='BTS_Tests' name='TC_dyn_ipa_pdch_act_tchf_act_nack' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_rll_est_ind' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_rll_est_req_DCCH_3' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_rll_est_req_ACCH_3' time='MASKED'/>
@@ -106,6 +174,9 @@
   <testcase classname='BTS_Tests' name='TC_encr_cmd_a51' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_encr_cmd_a52' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_encr_cmd_a53' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_err_rep_wrong_mdisc' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_err_rep_wrong_msg_type' time='MASKED'/>
+  <testcase classname='BTS_Tests' name='TC_err_rep_wrong_sequence' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_lapdm_selftest' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame_dtxd' time='MASKED'>
@@ -116,4 +187,65 @@
   </testcase>
   <testcase classname='BTS_Tests' name='TC_chopped_ipa_ping' time='MASKED'/>
   <testcase classname='BTS_Tests' name='TC_chopped_ipa_payload' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_cbch_load_idle_no_cbch' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_1block' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_2block' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_3block' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_4block' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_multi' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_schedule' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_default_only' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_default_and_normal' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_sms_cb_cmd_sdcch4_default_then_null' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_cbc_sdcch4_load_idle' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_cbc_sdcch4_load_overload' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_etws_p1ro' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_etws_p1ro_end' time='MASKED'/>
+  <testcase classname='BTS_Tests_SMSCB' name='TC_etws_pcu' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_ua_dcch_sapi0' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_ua_dcch_sapi0_nopayload' time='MASKED'>
+    <failure type='fail-verdict'>Initial SABM/UA must contain L3 payload but BTS accepts without
+      BTS_Tests_LAPDm.ttcn:MASKED BTS_Tests_LAPDm control part
+      BTS_Tests_LAPDm.ttcn:MASKED TC_sabm_ua_dcch_sapi0_nopayload testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_ua_dcch_sapi3' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_ua_dcch_sapi4' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_contention' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_retransmit' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_retransmit_bts' time='MASKED'>
+    <failure type='fail-verdict'>Incorrect number of SABM re-transmissions of observed: 7
+      BTS_Tests_LAPDm.ttcn:MASKED BTS_Tests_LAPDm control part
+      BTS_Tests_LAPDm.ttcn:MASKED TC_sabm_retransmit_bts testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_invalid_resp' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_dm' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_establish_ign_first_sabm' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_iframe_seq_and_ack' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_iframe_timer_recovery' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_ns_seq_error' time='MASKED'>
+    <failure type='fail-verdict'>Missing second REJ
+      BTS_Tests_LAPDm.ttcn:MASKED BTS_Tests_LAPDm control part
+      BTS_Tests_LAPDm.ttcn:MASKED TC_ns_seq_error testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_nr_seq_error' time='MASKED'>
+    <failure type='fail-verdict'>Missing DISC from BTS
+      BTS_Tests_LAPDm.ttcn:MASKED BTS_Tests_LAPDm control part
+      BTS_Tests_LAPDm.ttcn:MASKED TC_nr_seq_error testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_rec_invalid_frame' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_segm_concat_dcch' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_segm_concat_sacch' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_t200_n200' time='MASKED'>
+    <failure type='fail-verdict'>"BTS_Tests.ttcn:MASKED : Tguard timeout"
+      BTS_Tests_LAPDm.ttcn:MASKED BTS_Tests_LAPDm control part
+      BTS_Tests_LAPDm.ttcn:MASKED TC_t200_n200 testcase
+    </failure>
+  </testcase>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_rr_response_frame_loss' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_incorrect_cr' time='MASKED'/>
+  <testcase classname='BTS_Tests_LAPDm' name='TC_sabm_incorrect_c' time='MASKED'/>
 </testsuite>
diff --git a/hlr/expected-results.xml b/hlr/expected-results.xml
index b7d2773..7f1c277 100644
--- a/hlr/expected-results.xml
+++ b/hlr/expected-results.xml
@@ -1,10 +1,14 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='24' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='31' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='HLR_Tests' name='TC_gsup_sai_err_invalid_imsi' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_sai' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_gsup_sai_num_auth_vectors' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_gsup_sai_eps' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_ul_unknown_imsi' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_gsup_ul_unknown_imsi_via_proxy' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_sai_err_unknown_imsi' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_ul' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_gsup_ul_via_proxy' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_vty' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_vty_msisdn_isd' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_purge_cs' time='MASKED'/>
@@ -13,12 +17,15 @@
   <testcase classname='HLR_Tests' name='TC_mo_ussd_unknown' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_disc' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_imsi' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_imsi_via_proxy' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_msisdn' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_msisdn_via_proxy' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_euse' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_continue' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_defaultroute' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_mo_sss_reject' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_check_imei' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_gsup_check_imei_via_proxy' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_check_imei_invalid_len' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_check_imei_unknown_imsi' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_subscr_create_on_demand_check_imei_early' time='MASKED'/>
diff --git a/mgw/expected-results.xml b/mgw/expected-results.xml
index 8975f78..0a1bdac 100644
--- a/mgw/expected-results.xml
+++ b/mgw/expected-results.xml
@@ -1,8 +1,6 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='44' failures='0' errors='0' skipped='1' inconc='0' time='MASKED'>
-  <testcase classname='MGCP_Test' name='TC_selftest' time='MASKED'>
-    <skipped>no verdict</skipped>
-  </testcase>
+<testsuite name='Titan' tests='49' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+  <testcase classname='MGCP_Test' name='TC_selftest' time='MASKED'/>
   <testcase classname='MGCP_Test' name='TC_crcx' time='MASKED'/>
   <testcase classname='MGCP_Test' name='TC_crcx_no_lco' time='MASKED'/>
   <testcase classname='MGCP_Test' name='TC_crcx_noprefix' time='MASKED'/>
@@ -50,4 +48,5 @@
   <testcase classname='MGCP_Test' name='TC_amr_oa_bwe_rtp_conversion' time='MASKED'/>
   <testcase classname='MGCP_Test' name='TC_amr_oa_oa_rtp_conversion' time='MASKED'/>
   <testcase classname='MGCP_Test' name='TC_amr_bwe_bwe_rtp_conversion' time='MASKED'/>
+  <testcase classname='MGCP_Test' name='TC_conn_timeout' time='MASKED'/>
 </testsuite>
diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index 2d24d43..93d24c0 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='154' failures='9' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='179' failures='4' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
@@ -9,6 +9,7 @@
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
+      MSC_Tests.ttcn:MASKED MSC_Tests control part
       MSC_Tests.ttcn:MASKED TC_lu_imsi_timeout_tmsi_realloc testcase
     </failure>
   </testcase>
@@ -51,9 +52,12 @@
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_already_paging' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mo_sms' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_already_paging' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_repeated' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_smpp_mo_sms' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_smpp_mo_sms_rp_error' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_smpp_mt_sms' time='MASKED'/>
@@ -122,22 +126,15 @@
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_osmux' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_invalid_mgcp_crash' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_mm_id_resp_no_identity' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_expire_while_paging' time='MASKED'/>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_reject testcase
-    </failure>
-  </testcase>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_gsup testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_auth3g_tmsi' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
     <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
+      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
       MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_tmsi_realloc testcase
     </failure>
   </testcase>
@@ -147,12 +144,8 @@
       MSC_Tests_Iu.ttcn:MASKED TC_iu_cmserv_imsi_unknown testcase
     </failure>
   </testcase>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_call testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call_sccp_tiar_timeout' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_timeout' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_err' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_release_request' time='MASKED'/>
@@ -162,33 +155,27 @@
   <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_tmsi' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imei' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imei_reject' time='MASKED'/>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_emerg_call_imsi testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_establish_and_nothing' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_setup_and_nothing' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_timeout' time='MASKED'/>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'>
-    <failure type='fail-verdict'>Timeout waiting for channel release
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_mo_crcx_ran_reject testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_mt_crcx_ran_reject' time='MASKED'/>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_gsup_cancel testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_release_timeout' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_reset_two_1iu' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_call' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_call_already_paging' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_sms' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_already_paging' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_repeated' time='MASKED'>
+    <failure type='fail-verdict'>UTRAN: Expected a second Paging
+      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
+      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_sms_paging_repeated testcase
+    </failure>
+  </testcase>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_smpp_mo_sms' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_sms' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_smma' time='MASKED'/>
@@ -198,18 +185,8 @@
   <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_single_request' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_notification' time='MASKED'/>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_ussd_during_mt_call testcase
-    </failure>
-  </testcase>
-  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'>
-    <failure type='fail-verdict'>Tguard timeout
-      MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
-      MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_ussd_during_mt_call testcase
-    </failure>
-  </testcase>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_mo_release' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_ss_session_timeout' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_mt_ussd_for_unknown_subscr' time='MASKED'/>
diff --git a/pcu/expected-results.xml b/pcu/expected-results.xml
index e9610bd..ddee7ec 100644
--- a/pcu/expected-results.xml
+++ b/pcu/expected-results.xml
@@ -1,7 +1,47 @@
 <?xml version="1.0"?>
-<testsuite name='PCU_Tests' tests='4' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
-  <testcase classname='PCU_Tests' name='TC_ul_tbf_single_llc_sizes' time='MASKED'/>
-  <testcase classname='PCU_Tests' name='TC_ul_tbf' time='MASKED'/>
-  <testcase classname='PCU_Tests' name='TC_selftest_ns' time='MASKED'/>
-  <testcase classname='PCU_Tests' name='TC_paging' time='MASKED'/>
+<testsuite name='Titan' tests='34' failures='2' errors='0' skipped='0' inconc='0' time='MASKED'>
+  <testcase classname='PCU_Tests' name='TC_pcuif_suspend' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_ta_ptcch_idle' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_ta_rach_imm_ass' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_ta_idle_dl_tbf_ass' time='MASKED'>
+    <failure type='fail-verdict'>Timing Advance value doesn't match
+      PCU_Tests.ttcn:MASKED PCU_Tests control part
+      PCU_Tests.ttcn:MASKED TC_ta_idle_dl_tbf_ass testcase
+    </failure>
+  </testcase>
+  <testcase classname='PCU_Tests' name='TC_ta_ptcch_ul_multi_tbf' time='MASKED'>
+    <failure type='fail-verdict'>Failed to match Timing Advance Index for #0
+      PCU_Tests.ttcn:MASKED PCU_Tests control part
+      PCU_Tests.ttcn:MASKED TC_ta_ptcch_ul_multi_tbf testcase
+    </failure>
+  </testcase>
+  <testcase classname='PCU_Tests' name='TC_cs_lqual_ul_tbf' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_cs_initial_ul' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_cs_max_ul' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_t3169' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_t3193' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_mo_ping_pong' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_mo_ping_pong_with_ul_racap' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_mt_ping_pong' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_mt_ping_pong_with_dl_racap' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_imm_ass_dl_block_retrans' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_dl_flow_more_blocks' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_cs_from_bts' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_cs_from_sgsn_sign_ptmsi' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_cs_from_sgsn_sign' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_cs_from_sgsn_ptp' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_ps_from_sgsn_sign_ptmsi' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_ps_from_sgsn_sign' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_paging_ps_from_sgsn_ptp' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_egprs_pkt_chan_req_signalling' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_egprs_pkt_chan_req_one_phase' time='MASKED'/>
+  <testcase classname='PCU_Tests' name='TC_egprs_pkt_chan_req_two_phase' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_reset' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_reset_retrans' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_alive' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_alive_timeout_reset' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_unblock' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_unblock_retrans' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_full_bringup' time='MASKED'/>
+  <testcase classname='PCU_Tests_NS' name='TC_ns_so_block' time='MASKED'/>
 </testsuite>
diff --git a/sgsn/expected-results.xml b/sgsn/expected-results.xml
index 8381064..39d5529 100644
--- a/sgsn/expected-results.xml
+++ b/sgsn/expected-results.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='43' failures='3' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='57' failures='3' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='SGSN_Tests' name='TC_attach' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_mnc3' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_umts_aka_umts_res' time='MASKED'/>
@@ -61,6 +61,15 @@
   <testcase classname='SGSN_Tests' name='TC_attach_pdp_act_deact_gtp_retrans' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_pdp_act_deact_gtp_retrans_resp' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_pdp_act_user_error_ind_ggsn' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_attach_pdp_act_gmm_detach' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_gmm_attach_req_while_gmm_attach' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_xid_empty_l3' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_xid_n201u' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_llc_null' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_llc_sabm_dm_llgmm' time='MASKED'/>
+  <testcase classname='SGSN_Tests' name='TC_llc_sabm_dm_ll5' time='MASKED'/>
   <testcase classname='SGSN_Tests' name='TC_attach_req_id_req_ra_update' time='MASKED'/>
+  <testcase classname='SGSN_Tests_Iu' name='TC_iu_attach' time='MASKED'/>
+  <testcase classname='SGSN_Tests_Iu' name='TC_iu_attach_geran_rau' time='MASKED'/>
+  <testcase classname='SGSN_Tests_Iu' name='TC_geran_attach_iu_rau' time='MASKED'/>
 </testsuite>
diff --git a/sip/expected-results.xml b/sip/expected-results.xml
index c704f85..2ac1ec5 100644
--- a/sip/expected-results.xml
+++ b/sip/expected-results.xml
@@ -1,7 +1,8 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='4' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='5' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='SIP_Tests' name='TC_mt_success_rel_gsm' time='MASKED'/>
   <testcase classname='SIP_Tests' name='TC_mt_success_rel_sip' time='MASKED'/>
   <testcase classname='SIP_Tests' name='TC_mo_success_rel_gsm' time='MASKED'/>
   <testcase classname='SIP_Tests' name='TC_mo_success_rel_sip' time='MASKED'/>
+  <testcase classname='SIP_Tests' name='TC_mo_setup_disc_late_rtp' time='MASKED'/>
 </testsuite>