update expected results
Change-Id: I37014274ee97f09985c31966e7cc9122fe11a856
diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index 2d24d43..93d24c0 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='154' failures='9' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='179' failures='4' errors='0' skipped='0' inconc='0' time='MASKED'>
<testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
@@ -9,6 +9,7 @@
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
<failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
+ MSC_Tests.ttcn:MASKED MSC_Tests control part
MSC_Tests.ttcn:MASKED TC_lu_imsi_timeout_tmsi_realloc testcase
</failure>
</testcase>
@@ -51,9 +52,12 @@
<testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_already_paging' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mo_sms' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_sms' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_already_paging' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_repeated' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_smpp_mo_sms' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_smpp_mo_sms_rp_error' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_smpp_mt_sms' time='MASKED'/>
@@ -122,22 +126,15 @@
<testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_mt_call_osmux' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_invalid_mgcp_crash' time='MASKED'/>
+ <testcase classname='MSC_Tests' name='TC_mm_id_resp_no_identity' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_lu_and_expire_while_paging' time='MASKED'/>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_reject testcase
- </failure>
- </testcase>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_gsup testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_auth3g_tmsi' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
<failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
+ MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_tmsi_realloc testcase
</failure>
</testcase>
@@ -147,12 +144,8 @@
MSC_Tests_Iu.ttcn:MASKED TC_iu_cmserv_imsi_unknown testcase
</failure>
</testcase>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_call testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call_sccp_tiar_timeout' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_timeout' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_err' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_release_request' time='MASKED'/>
@@ -162,33 +155,27 @@
<testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_tmsi' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imei' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imei_reject' time='MASKED'/>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_emerg_call_imsi testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_establish_and_nothing' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_mo_setup_and_nothing' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_timeout' time='MASKED'/>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'>
- <failure type='fail-verdict'>Timeout waiting for channel release
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_mo_crcx_ran_reject testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_mt_crcx_ran_reject' time='MASKED'/>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_gsup_cancel testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_mo_release_timeout' time='MASKED'/>
<testcase classname='MSC_Tests' name='TC_reset_two_1iu' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_call' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_call_already_paging' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_sms' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_already_paging' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_repeated' time='MASKED'>
+ <failure type='fail-verdict'>UTRAN: Expected a second Paging
+ MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
+ MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_sms_paging_repeated testcase
+ </failure>
+ </testcase>
<testcase classname='MSC_Tests_Iu' name='TC_iu_smpp_mo_sms' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_sms' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_smma' time='MASKED'/>
@@ -198,18 +185,8 @@
<testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_single_request' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_notification' time='MASKED'/>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_ussd_during_mt_call testcase
- </failure>
- </testcase>
- <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'>
- <failure type='fail-verdict'>Tguard timeout
- MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
- MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_ussd_during_mt_call testcase
- </failure>
- </testcase>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'/>
+ <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_mo_release' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_ss_session_timeout' time='MASKED'/>
<testcase classname='MSC_Tests_Iu' name='TC_iu_mt_ussd_for_unknown_subscr' time='MASKED'/>