diff --git a/bts/BTS_Tests.ttcn b/bts/BTS_Tests.ttcn
index fd2e50f..67f302f 100644
--- a/bts/BTS_Tests.ttcn
+++ b/bts/BTS_Tests.ttcn
@@ -3836,10 +3836,16 @@
 	var octetstring l2_fill_frame_sacch := substr(l2_fill_frame, 0, lengthof(l2_fill_frame) - 2);
 	var GsmFrameNumber first_fn;
 	var boolean is_first_frame := true;
-	var integer nfill_frames := 0;
-	const integer dtx_tchf_mod := 104;
+	var integer nfill_frames_sacch := 0;
+	var integer nfill_frames_nonsacch := 0;
+	var integer expected_fill_frames := 10000; /* initial value causes test failure if not overridden */
 	/* Frames numbers (mod 104) for which a fill frame is expected on TCHF if DTX is enabled. */
 	var Integers required_tdma_frames_dtx_tchf := { 52, 53, 54, 55, 56, 57, 58, 59 };
+	const integer frame_dtx_tchf_mod := 104;
+	/* Frame numbers (mod 104) for which a fill frame is expected at the L1SAP level,
+	 * which operates in terms of blocks rather than frames. */
+	var Integers required_tdma_blocks_dtx_tchf := { 52, 56 };
+	const integer block_dtx_tchf_mod := 26;
 	timer T := 5.0;
 
 	f_l1_tune(L1CTL);
@@ -3876,32 +3882,51 @@
 				f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
 				setverdict(fail, "Received fill frame on non-TCH/F channel; DTX is only allowed on TCH/F!");
 			}
-			if (fn >= first_fn + dtx_tchf_mod) {
+			if (fn > first_fn + frame_dtx_tchf_mod) {
 				T.stop;
 				f_rsl_chan_deact();
 				f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
-				/* With DTX enabled we can expect at least 1 fill frame every 104 frames. */
-				if (nfill_frames < 1) {
-					setverdict(fail);
+
+				/* With DTX enabled we can expect at least 3 fill frames for every 104 frames.
+				 * 2 SACCH, 1 TCH/F */
+				expected_fill_frames := 3;
+
+				if (nfill_frames_sacch + nfill_frames_nonsacch < expected_fill_frames) {
+					log("received only ", nfill_frames_sacch, "+", nfill_frames_nonsacch,
+					    " (SACCH+other) out of ", expected_fill_frames, " expected fill frames");
+					setverdict(fail, "Not enough fill frames received");
 				} else {
 					setverdict(pass);
 				}
-			}
-			for (var integer i := 0; i < lengthof(required_tdma_frames_dtx_tchf); i := i + 1) {
-				if (fn mod dtx_tchf_mod == required_tdma_frames_dtx_tchf[i]) {
-					nfill_frames := nfill_frames + 1;
+			} else {
+				if (dl.dl_info.link_id.c == SACCH) {
+					nfill_frames_sacch := nfill_frames_sacch + 1;
 					repeat;
 				}
+				/* On DTX TCH/F channels, fill frames occur only for specific frame numbers mod 104.
+				 * Furthermore, the L1SAP layer gives us frame numbers for the start of a block so
+				 * we should only see the subset of frames numbers which correspond to a block boundary.
+				 * TCH/F blocks are defined to start at 0,4,8,13,17,21 (modulo 26) */
+				for (var integer i := 0; i < lengthof(required_tdma_blocks_dtx_tchf); i := i + 1) {
+					if (fn mod frame_dtx_tchf_mod == required_tdma_blocks_dtx_tchf[i]) {
+						nfill_frames_nonsacch := nfill_frames_nonsacch + 1;
+						repeat;
+					}
+				}
+				log("Received DTX TCH fill frame with bad frame number: ", fn,
+				    " (mod ", frame_dtx_tchf_mod, ": ", fn mod frame_dtx_tchf_mod, ")",
+				    " (mod ", block_dtx_tchf_mod, ": ", fn mod block_dtx_tchf_mod, ")");
+				f_rsl_chan_deact();
+				f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
+				setverdict(fail, "Unexpected L2 fill frame received on Um");
 			}
-			log("Received DTX TCH fill frame with bad frame number: ", fn,
-			    " (mod ", dtx_tchf_mod, ": ", fn mod dtx_tchf_mod, ")");
-			f_rsl_chan_deact();
-			f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
-			setverdict(fail, "Unexpected L2 fill frame received on Um");
 		} else {
-			nfill_frames := nfill_frames + 1;
-			if (fn >= first_fn + dtx_tchf_mod) {
-				var integer expected_fill_frames;
+			if (dl.dl_info.link_id.c == SACCH) {
+				nfill_frames_sacch := nfill_frames_sacch + 1;
+			} else {
+				nfill_frames_nonsacch := nfill_frames_nonsacch + 1;
+			}
+			if (fn > first_fn + frame_dtx_tchf_mod) {
 				T.stop;
 				if (f_g_chan_is_tchf()) {
 					/* Without DTX we can expect 25 fill frames for every 104 frames.
@@ -3921,9 +3946,12 @@
 
 				f_rsl_chan_deact();
 				f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
-				if (nfill_frames >= expected_fill_frames) {
+
+				if (nfill_frames_sacch + nfill_frames_nonsacch >= expected_fill_frames) {
 					setverdict(pass);
 				} else {
+					log("received only ", nfill_frames_sacch, "+", nfill_frames_nonsacch,
+					    " (SACCH+other) out of ", expected_fill_frames, " expected fill frames");
 					setverdict(fail, "Not enough fill frames received");
 				}
 			} else {