commit 873ae201bd4d6252b3ab1543a1453dc4f88ea509
author Neels Hofmeyr <neels@hofmeyr.de> Thu Sep 06 14:13:34 2018 +0200
committer Neels Hofmeyr <neels@hofmeyr.de> Thu Sep 06 14:13:34 2018 +0200
tree 07db3d26ac6b2f0f994a4a030d59544d073fc7f7
parent 15faf92611bf5a8849379f4e48441e56e52f6247

update expected results

Change-Id: I32c29e62ca317937db771f8fb1540bb1fe9da2ab

hlr/expected-results.xml

diff --git a/hlr/expected-results.xml b/hlr/expected-results.xml
index 039c1f7..5431b78 100644
--- a/hlr/expected-results.xml
+++ b/hlr/expected-results.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='10' failures='1' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='17' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='HLR_Tests' name='TC_gsup_sai_err_invalid_imsi' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_sai' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_ul_unknown_imsi' time='MASKED'/>
@@ -10,4 +10,11 @@
   <testcase classname='HLR_Tests' name='TC_gsup_purge_cs' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_purge_ps' time='MASKED'/>
   <testcase classname='HLR_Tests' name='TC_gsup_purge_unknown' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_unknown' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_disc' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_imsi' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_iuse_msisdn' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_euse' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_continue' time='MASKED'/>
+  <testcase classname='HLR_Tests' name='TC_mo_ussd_euse_defaultroute' time='MASKED'/>
 </testsuite>