update expected results
Change-Id: I32c29e62ca317937db771f8fb1540bb1fe9da2ab
diff --git a/bts/expected-results.xml b/bts/expected-results.xml
index 8bfd305..73de1fb 100644
--- a/bts/expected-results.xml
+++ b/bts/expected-results.xml
@@ -1,5 +1,5 @@
<?xml version="1.0"?>
-<testsuite name='Titan' tests='83' failures='0' errors='1' skipped='1' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='85' failures='1' errors='0' skipped='1' inconc='0' time='MASKED'>
<testcase classname='BTS_Tests' name='TC_chan_act_stress' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_chan_act_react' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_chan_deact_not_active' time='MASKED'/>
@@ -87,7 +87,7 @@
<testcase classname='BTS_Tests' name='TC_lapdm_selftest' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame' time='MASKED'/>
<testcase classname='BTS_Tests' name='TC_tch_sign_l2_fill_frame_dtxd' time='MASKED'>
- <failure type='fail-verdict'>"Unexpected L2 fill frame received on Um"
+ <failure type='fail-verdict'>Not enough fill frames received
BTS_Tests.ttcn:MASKED BTS_Tests control part
BTS_Tests.ttcn:MASKED TC_tch_sign_l2_fill_frame_dtxd testcase
</failure>