diff --git a/hnbgw/expected-results.xml b/hnbgw/expected-results.xml
index fb86108..a48c232 100644
--- a/hnbgw/expected-results.xml
+++ b/hnbgw/expected-results.xml
@@ -1,8 +1,8 @@
 <?xml version="1.0"?>
-<testsuite name='Titan' tests='13' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
+<testsuite name='Titan' tests='42' failures='0' errors='0' skipped='0' inconc='0' time='MASKED'>
   <testcase classname='HNBGW_Tests' name='TC_hnb_register' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_hnb_register_duplicate' time='MASKED'/>
-  <testcase classname='HNBGW_Tests' name='TC_hnb_register_duplicate_reuse_sctp_assoc' time='MASKED'
+  <testcase classname='HNBGW_Tests' name='TC_hnb_register_duplicate_reuse_sctp_assoc' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_ranap_cs_initial_ue' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_ranap_ps_initial_ue' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_ranap_cs_initial_ue_empty_cr' time='MASKED'/>
@@ -17,5 +17,29 @@
   <testcase classname='HNBGW_Tests' name='TC_ranap_cs_mo_disconnect' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_ranap_ps_mo_disconnect' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_ps_rab_assignment_without_pfcp' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Compl_on_1_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Complete_by_imsi_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_LU_by_tmsi_null_nri_0_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_LU_by_tmsi_null_nri_1_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Complete_by_tmsi_unassigned_nri_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Complete_by_tmsi_valid_nri_msc_not_connected_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Complete_by_tmsi_valid_nri_1' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_L3Complete_by_tmsi_valid_nri_2' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_LU_by_tmsi_from_other_PLMN' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_paging_imsi' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_paging_tmsi' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_no_allow_attach_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_no_allow_attach_valid_nri' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_sccp_n_pcstate_detaches_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_mscpool_sccp_n_pcstate_attaches_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_L3Compl_on_1_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_L3Complete_no_nri_round_robin' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_L3Complete_valid_nri_1' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_L3Complete_valid_nri_2' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_nri_from_other_PLMN' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_sccp_n_pcstate_detaches_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_sgsnpool_sccp_n_pcstate_attaches_cnlink' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_second_rab_assignment' time='MASKED'/>
   <testcase classname='HNBGW_Tests' name='TC_hnb_reregister_reuse_sctp_assoc' time='MASKED'/>
+  <testcase classname='HNBGW_Tests' name='TC_apply_sccp' time='MASKED'/>
 </testsuite>