diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index a01cd22..4e2eeba 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -56,6 +56,9 @@
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_no_cm' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_2' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_013_2' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_0134_1' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_0134_34' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_mo_release_timeout' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>