diff --git a/msc/expected-results.xml b/msc/expected-results.xml
index 68e2958..2d24d43 100644
--- a/msc/expected-results.xml
+++ b/msc/expected-results.xml
@@ -122,6 +122,7 @@
   <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
   <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_osmux' time='MASKED'/>
+  <testcase classname='MSC_Tests' name='TC_lu_and_expire_while_paging' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'>
     <failure type='fail-verdict'>Tguard timeout
       MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
@@ -219,5 +220,6 @@
   <testcase classname='MSC_Tests_Iu' name='TC_iu_multi_lu_and_mo_ussd' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_multi_lu_and_mt_ussd' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_with_invalid_mcc_mnc' time='MASKED'/>
+  <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_expire_while_paging' time='MASKED'/>
   <testcase classname='MSC_Tests_Iu' name='TC_mo_cc_iu_release' time='MASKED'/>
 </testsuite>