BitVector: Remove Generator class.
It is not used in osmo-trx, because we're not doing FEC or CRC checks.
Change-Id: I1509e785c1187ebdafe5b2518bd298fbbd1cd036
diff --git a/CommonLibs/BitVector.cpp b/CommonLibs/BitVector.cpp
index 3b556b9..cf408cd 100644
--- a/CommonLibs/BitVector.cpp
+++ b/CommonLibs/BitVector.cpp
@@ -200,25 +200,6 @@
-uint64_t BitVector::syndrome(Generator& gen) const
-{
- gen.clear();
- const char *dp = mStart;
- while (dp<mEnd) gen.syndromeShift(*dp++);
- return gen.state();
-}
-
-
-uint64_t BitVector::parity(Generator& gen) const
-{
- gen.clear();
- const char *dp = mStart;
- while (dp<mEnd) gen.encoderShift(*dp++);
- return gen.state();
-}
-
-
-
unsigned BitVector::sum() const
{
unsigned sum = 0;
diff --git a/CommonLibs/BitVector.h b/CommonLibs/BitVector.h
index d2acb5f..559dd99 100644
--- a/CommonLibs/BitVector.h
+++ b/CommonLibs/BitVector.h
@@ -30,65 +30,6 @@
#include <stdint.h>
-class BitVector;
-class SoftVector;
-
-
-
-/** Shift-register (LFSR) generator. */
-class Generator {
-
- private:
-
- uint64_t mCoeff; ///< polynomial coefficients. LSB is zero exponent.
- uint64_t mState; ///< shift register state. LSB is most recent.
- uint64_t mMask; ///< mask for reading state
- unsigned mLen; ///< number of bits used in shift register
- unsigned mLen_1; ///< mLen - 1
-
- public:
-
- Generator(uint64_t wCoeff, unsigned wLen)
- :mCoeff(wCoeff),mState(0),
- mMask((1ULL<<wLen)-1),
- mLen(wLen),mLen_1(wLen-1)
- { assert(wLen<64); }
-
- void clear() { mState=0; }
-
- /**@name Accessors */
- //@{
- uint64_t state() const { return mState & mMask; }
- unsigned size() const { return mLen; }
- //@}
-
- /**
- Calculate one bit of a syndrome.
- This is in the .h for inlining.
- */
- void syndromeShift(unsigned inBit)
- {
- const unsigned fb = (mState>>(mLen_1)) & 0x01;
- mState = (mState<<1) ^ (inBit & 0x01);
- if (fb) mState ^= mCoeff;
- }
-
- /**
- Update the generator state by one cycle.
- This is in the .h for inlining.
- */
- void encoderShift(unsigned inBit)
- {
- const unsigned fb = ((mState>>(mLen_1)) ^ inBit) & 0x01;
- mState <<= 1;
- if (fb) mState ^= mCoeff;
- }
-
-
-};
-
-
-
class BitVector : public Vector<char> {
@@ -146,14 +87,6 @@
void zero() { fill(0); }
- /**@name FEC operations. */
- //@{
- /** Calculate the syndrome of the vector with the given Generator. */
- uint64_t syndrome(Generator& gen) const;
- /** Calculate the parity word for the vector with the given Generator. */
- uint64_t parity(Generator& gen) const;
- //@}
-
/** Invert 0<->1. */
void invert();