alloc: Fix MS_B/MS_C interpretation
Currently the handling of MS_B and MS_C is not compliant with TS
45.002, annex B.1. These values may only interpreted as 0, if
frequency hopping is not enabled and if there is no change from Rx to
Tx or vice-versa.
This commit sets Ttb/Trb to 1 if the table entry is MS_B/MS_C, since
only combined down/up access modes are supported.
Sponsored-by: On-Waves ehf
diff --git a/src/gprs_rlcmac_ts_alloc.cpp b/src/gprs_rlcmac_ts_alloc.cpp
index b9d4e41..ec228d1 100644
--- a/src/gprs_rlcmac_ts_alloc.cpp
+++ b/src/gprs_rlcmac_ts_alloc.cpp
@@ -405,13 +405,21 @@
Trb = ms_class->rb;
Type = ms_class->type;
- /* Tta and Ttb may depend on hopping or frequency change */
- /* TODO: Set them to 1 */
- if (Ttb == MS_A || Ttb == MS_B)
+ /* MS_A maps to 0 if frequency hopping is disabled */
+ /* TODO: Set it to 1 if FH is implemented and enabled */
+ if (Ttb == MS_A)
Ttb = 0;
- if (Trb == MS_A || Trb == MS_C)
+ if (Trb == MS_A)
Trb = 0;
+ /* MS_A and MS_B are 0 iff FH is disabled and there is no Tx/Rx change.
+ * This is never the case with the current implementation, so 1 will
+ * always be used. */
+ if (Ttb == MS_B)
+ Ttb = 1;
+ if (Trb == MS_C)
+ Trb = 1;
+
LOGP(DRLCMAC, LOGL_DEBUG, "- Rx=%d Tx=%d Sum Rx+Tx=%s Tta=%s Ttb=%d "
" Tra=%d Trb=%d Type=%d\n", ms_class->rx, Tx,
(Sum == MS_NA) ? "N/A" : digit[Sum],