tree 94b7e83bd6f13a713bb6ba94d337cd9170d29caf
parent 0abe343d926aad252e2c89272712900e1b3d197a
author Sylvain Munaut <tnt@246tNt.com> 1641453124 +0100
committer Sylvain Munaut <tnt@246tNt.com> 1641752354 +0100

icE1usb fw: Better flow regulation mechanism

 * FIFO target level :

   - The '8 * 16' makes no sense as the FIFO was 128 so this
     is the "full" case and could never be that high.

   - We tighten up the margin around 5 * 16 which is the "target"
     level for the FIFO

 * FIFO size :

   We also increase the FIFO size to 256 frames. This doesn't
   actually affect latency since the target level is the same,
   but it allows more leeway to recover without data loss in
   case something goes wrong.

 * Ticks :

   We don't bother using ticks ... the current algo wasn't
   working (or rather not doing anything all that useful),
   because the difference between USB clock and E1 clock is
   tiny and measured over 1 ms, it's not meaningful.

   So for the time being we just sent the nominal rate biased
   with the FIFO level to keep it on target and this seems
   to work fine.

   It'd be nice to have a good long term estimate of the rate
   to minimize the jitter, but it doesn't seem to be strictly
   required for operation for now.

 * Misc cleanup :

   Just do all in one function instead of splitting the check
   if BD needs refill and the actual refill.

This gets rid of sporadic 'TX FIFO Overflow' conditions
by properly handling the case where we have a bit too much
data.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Change-Id: Ibd3bc9080961cc56093e43ab9a824840e84c24d2