hardware/icE1usb: Initial import of the production hardware design files

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
diff --git a/hardware/icE1usb/e1bias.sch b/hardware/icE1usb/e1bias.sch
new file mode 100644
index 0000000..68d7314
--- /dev/null
+++ b/hardware/icE1usb/e1bias.sch
@@ -0,0 +1,333 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 5 7
+Title "icE1usb - E1 interface bias generation"
+Date "2020-08-26"
+Rev "1.0"
+Comp ""
+Comment1 "CERN-OHL-S"
+Comment2 "(C) 2020 Sylvain Munaut"
+Comment3 ""
+Comment4 ""
+$EndDescr
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+bias0
+Text HLabel 2000 4500 0    50   Input ~ 0
+bias1
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+bias_a_p
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+bias_a_n
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+bias_b_n
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+A-
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+B-
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+Single Sensitivity\nDual Rail bias adjust
+Text Notes 6600 3400 0    50   ~ 0
+Dual Sensitivity\nSingle Rail bias adjust
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+Fixed
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+Fixed
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+f_c = 16 Hz for single pole RC
+$EndSCHEMATC