| commit | b39d83251c0e4e699d43e0b7083ed63416b127ca | [log] [tgz] |
|---|---|---|
| author | Eric Wild <ewild@sysmocom.de> | Wed Nov 27 16:50:28 2019 +0100 |
| committer | Eric Wild <ewild@sysmocom.de> | Thu Nov 28 13:42:16 2019 +0100 |
| tree | 2331ba66d6646f1e975e75b7ae7d872583f1bceb | |
| parent | c7d980cc8696b0f6bb09c2d887b3bfcc9ad8e89b [diff] [blame] |
cuart icc clock freq and divider setting support Change-Id: I9c99c68511d3972513348ee6be5e7bb3b3a5f99e
diff --git a/sysmoOCTSIM/ncn8025.h b/sysmoOCTSIM/ncn8025.h index 2e774a7..01ddc97 100644 --- a/sysmoOCTSIM/ncn8025.h +++ b/sysmoOCTSIM/ncn8025.h
@@ -14,6 +14,8 @@ SIM_CLKDIV_8 = 0, }; +extern const unsigned int ncn8025_div_val[]; + struct ncn8025_settings { bool rstin; /* Reset signal (true: asserted low) */ bool cmdvcc; /* Command VCC pin. Activation sequence Enable (true: active low) */