diff --git a/sysmoOCTSIM/hri/hri_dsu_e54.h b/sysmoOCTSIM/hri/hri_dsu_e54.h
index 82e24b6..b192276 100644
--- a/sysmoOCTSIM/hri/hri_dsu_e54.h
+++ b/sysmoOCTSIM/hri/hri_dsu_e54.h
@@ -3,7 +3,7 @@
  *
  * \brief SAM DSU
  *
- * Copyright (c) 2017-2018 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2017-2019 Microchip Technology Inc. and its subsidiaries.
  *
  * \asf_license_start
  *
@@ -58,7 +58,6 @@
 typedef uint32_t hri_dsu_cid3_reg_t;
 typedef uint32_t hri_dsu_data_reg_t;
 typedef uint32_t hri_dsu_dcc_reg_t;
-typedef uint32_t hri_dsu_dcfg_reg_t;
 typedef uint32_t hri_dsu_did_reg_t;
 typedef uint32_t hri_dsu_end_reg_t;
 typedef uint32_t hri_dsu_entry0_reg_t;
@@ -107,16 +106,6 @@
 	return (((Dsu *)hw)->STATUSB.reg & DSU_STATUSB_CELCK) >> DSU_STATUSB_CELCK_Pos;
 }
 
-static inline bool hri_dsu_get_STATUSB_TDCCD0_bit(const void *const hw)
-{
-	return (((Dsu *)hw)->STATUSB.reg & DSU_STATUSB_TDCCD0) >> DSU_STATUSB_TDCCD0_Pos;
-}
-
-static inline bool hri_dsu_get_STATUSB_TDCCD1_bit(const void *const hw)
-{
-	return (((Dsu *)hw)->STATUSB.reg & DSU_STATUSB_TDCCD1) >> DSU_STATUSB_TDCCD1_Pos;
-}
-
 static inline hri_dsu_statusb_reg_t hri_dsu_get_STATUSB_reg(const void *const hw, hri_dsu_statusb_reg_t mask)
 {
 	uint8_t tmp;
@@ -1172,95 +1161,6 @@
 	return ((Dsu *)hw)->CFG.reg;
 }
 
-static inline void hri_dsu_set_DCFG_DCFG_bf(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg |= DSU_DCFG_DCFG(mask);
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_dsu_dcfg_reg_t hri_dsu_get_DCFG_DCFG_bf(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Dsu *)hw)->DCFG[index].reg;
-	tmp = (tmp & DSU_DCFG_DCFG(mask)) >> DSU_DCFG_DCFG_Pos;
-	return tmp;
-}
-
-static inline void hri_dsu_write_DCFG_DCFG_bf(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t data)
-{
-	uint32_t tmp;
-	DSU_CRITICAL_SECTION_ENTER();
-	tmp = ((Dsu *)hw)->DCFG[index].reg;
-	tmp &= ~DSU_DCFG_DCFG_Msk;
-	tmp |= DSU_DCFG_DCFG(data);
-	((Dsu *)hw)->DCFG[index].reg = tmp;
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_dsu_clear_DCFG_DCFG_bf(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg &= ~DSU_DCFG_DCFG(mask);
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_dsu_toggle_DCFG_DCFG_bf(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg ^= DSU_DCFG_DCFG(mask);
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_dsu_dcfg_reg_t hri_dsu_read_DCFG_DCFG_bf(const void *const hw, uint8_t index)
-{
-	uint32_t tmp;
-	tmp = ((Dsu *)hw)->DCFG[index].reg;
-	tmp = (tmp & DSU_DCFG_DCFG_Msk) >> DSU_DCFG_DCFG_Pos;
-	return tmp;
-}
-
-static inline void hri_dsu_set_DCFG_reg(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg |= mask;
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_dsu_dcfg_reg_t hri_dsu_get_DCFG_reg(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Dsu *)hw)->DCFG[index].reg;
-	tmp &= mask;
-	return tmp;
-}
-
-static inline void hri_dsu_write_DCFG_reg(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t data)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg = data;
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_dsu_clear_DCFG_reg(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg &= ~mask;
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_dsu_toggle_DCFG_reg(const void *const hw, uint8_t index, hri_dsu_dcfg_reg_t mask)
-{
-	DSU_CRITICAL_SECTION_ENTER();
-	((Dsu *)hw)->DCFG[index].reg ^= mask;
-	DSU_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_dsu_dcfg_reg_t hri_dsu_read_DCFG_reg(const void *const hw, uint8_t index)
-{
-	return ((Dsu *)hw)->DCFG[index].reg;
-}
-
 static inline bool hri_dsu_get_STATUSA_DONE_bit(const void *const hw)
 {
 	return (((Dsu *)hw)->STATUSA.reg & DSU_STATUSA_DONE) >> DSU_STATUSA_DONE_Pos;
diff --git a/sysmoOCTSIM/hri/hri_supc_e54.h b/sysmoOCTSIM/hri/hri_supc_e54.h
index 3f38d15..501c36f 100644
--- a/sysmoOCTSIM/hri/hri_supc_e54.h
+++ b/sysmoOCTSIM/hri/hri_supc_e54.h
@@ -3,7 +3,7 @@
  *
  * \brief SAM SUPC
  *
- * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
+ * Copyright (c) 2016-2019 Microchip Technology Inc. and its subsidiaries.
  *
  * \asf_license_start
  *
@@ -53,7 +53,6 @@
 typedef uint32_t hri_supc_bbps_reg_t;
 typedef uint32_t hri_supc_bkin_reg_t;
 typedef uint32_t hri_supc_bkout_reg_t;
-typedef uint32_t hri_supc_bod12_reg_t;
 typedef uint32_t hri_supc_bod33_reg_t;
 typedef uint32_t hri_supc_intenset_reg_t;
 typedef uint32_t hri_supc_intflag_reg_t;
@@ -91,36 +90,6 @@
 	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_B33SRDY;
 }
 
-static inline bool hri_supc_get_INTFLAG_BOD12RDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12RDY) >> SUPC_INTFLAG_BOD12RDY_Pos;
-}
-
-static inline void hri_supc_clear_INTFLAG_BOD12RDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12RDY;
-}
-
-static inline bool hri_supc_get_INTFLAG_BOD12DET_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12DET) >> SUPC_INTFLAG_BOD12DET_Pos;
-}
-
-static inline void hri_supc_clear_INTFLAG_BOD12DET_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12DET;
-}
-
-static inline bool hri_supc_get_INTFLAG_B12SRDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_B12SRDY) >> SUPC_INTFLAG_B12SRDY_Pos;
-}
-
-static inline void hri_supc_clear_INTFLAG_B12SRDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_B12SRDY;
-}
-
 static inline bool hri_supc_get_INTFLAG_VREGRDY_bit(const void *const hw)
 {
 	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_VREGRDY) >> SUPC_INTFLAG_VREGRDY_Pos;
@@ -171,36 +140,6 @@
 	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_B33SRDY;
 }
 
-static inline bool hri_supc_get_interrupt_BOD12RDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12RDY) >> SUPC_INTFLAG_BOD12RDY_Pos;
-}
-
-static inline void hri_supc_clear_interrupt_BOD12RDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12RDY;
-}
-
-static inline bool hri_supc_get_interrupt_BOD12DET_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12DET) >> SUPC_INTFLAG_BOD12DET_Pos;
-}
-
-static inline void hri_supc_clear_interrupt_BOD12DET_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12DET;
-}
-
-static inline bool hri_supc_get_interrupt_B12SRDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_B12SRDY) >> SUPC_INTFLAG_B12SRDY_Pos;
-}
-
-static inline void hri_supc_clear_interrupt_B12SRDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_B12SRDY;
-}
-
 static inline bool hri_supc_get_interrupt_VREGRDY_bit(const void *const hw)
 {
 	return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_VREGRDY) >> SUPC_INTFLAG_VREGRDY_Pos;
@@ -311,78 +250,6 @@
 	((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_B33SRDY;
 }
 
-static inline void hri_supc_set_INTEN_BOD12RDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_BOD12RDY;
-}
-
-static inline bool hri_supc_get_INTEN_BOD12RDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTENSET.reg & SUPC_INTENSET_BOD12RDY) >> SUPC_INTENSET_BOD12RDY_Pos;
-}
-
-static inline void hri_supc_write_INTEN_BOD12RDY_bit(const void *const hw, bool value)
-{
-	if (value == 0x0) {
-		((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_BOD12RDY;
-	} else {
-		((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_BOD12RDY;
-	}
-}
-
-static inline void hri_supc_clear_INTEN_BOD12RDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_BOD12RDY;
-}
-
-static inline void hri_supc_set_INTEN_BOD12DET_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_BOD12DET;
-}
-
-static inline bool hri_supc_get_INTEN_BOD12DET_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTENSET.reg & SUPC_INTENSET_BOD12DET) >> SUPC_INTENSET_BOD12DET_Pos;
-}
-
-static inline void hri_supc_write_INTEN_BOD12DET_bit(const void *const hw, bool value)
-{
-	if (value == 0x0) {
-		((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_BOD12DET;
-	} else {
-		((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_BOD12DET;
-	}
-}
-
-static inline void hri_supc_clear_INTEN_BOD12DET_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_BOD12DET;
-}
-
-static inline void hri_supc_set_INTEN_B12SRDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_B12SRDY;
-}
-
-static inline bool hri_supc_get_INTEN_B12SRDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->INTENSET.reg & SUPC_INTENSET_B12SRDY) >> SUPC_INTENSET_B12SRDY_Pos;
-}
-
-static inline void hri_supc_write_INTEN_B12SRDY_bit(const void *const hw, bool value)
-{
-	if (value == 0x0) {
-		((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_B12SRDY;
-	} else {
-		((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_B12SRDY;
-	}
-}
-
-static inline void hri_supc_clear_INTEN_B12SRDY_bit(const void *const hw)
-{
-	((Supc *)hw)->INTENCLR.reg = SUPC_INTENSET_B12SRDY;
-}
-
 static inline void hri_supc_set_INTEN_VREGRDY_bit(const void *const hw)
 {
 	((Supc *)hw)->INTENSET.reg = SUPC_INTENSET_VREGRDY;
@@ -475,21 +342,6 @@
 	return (((Supc *)hw)->STATUS.reg & SUPC_STATUS_B33SRDY) >> SUPC_STATUS_B33SRDY_Pos;
 }
 
-static inline bool hri_supc_get_STATUS_BOD12RDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->STATUS.reg & SUPC_STATUS_BOD12RDY) >> SUPC_STATUS_BOD12RDY_Pos;
-}
-
-static inline bool hri_supc_get_STATUS_BOD12DET_bit(const void *const hw)
-{
-	return (((Supc *)hw)->STATUS.reg & SUPC_STATUS_BOD12DET) >> SUPC_STATUS_BOD12DET_Pos;
-}
-
-static inline bool hri_supc_get_STATUS_B12SRDY_bit(const void *const hw)
-{
-	return (((Supc *)hw)->STATUS.reg & SUPC_STATUS_B12SRDY) >> SUPC_STATUS_B12SRDY_Pos;
-}
-
 static inline bool hri_supc_get_STATUS_VREGRDY_bit(const void *const hw)
 {
 	return (((Supc *)hw)->STATUS.reg & SUPC_STATUS_VREGRDY) >> SUPC_STATUS_VREGRDY_Pos;
@@ -1017,391 +869,6 @@
 	return ((Supc *)hw)->BOD33.reg;
 }
 
-static inline void hri_supc_set_BOD12_ENABLE_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_ENABLE;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline bool hri_supc_get_BOD12_ENABLE_bit(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_ENABLE) >> SUPC_BOD12_ENABLE_Pos;
-	return (bool)tmp;
-}
-
-static inline void hri_supc_write_BOD12_ENABLE_bit(const void *const hw, bool value)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_ENABLE;
-	tmp |= value << SUPC_BOD12_ENABLE_Pos;
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_ENABLE_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_ENABLE;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_ENABLE_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_ENABLE;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_set_BOD12_HYST_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_HYST;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline bool hri_supc_get_BOD12_HYST_bit(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_HYST) >> SUPC_BOD12_HYST_Pos;
-	return (bool)tmp;
-}
-
-static inline void hri_supc_write_BOD12_HYST_bit(const void *const hw, bool value)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_HYST;
-	tmp |= value << SUPC_BOD12_HYST_Pos;
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_HYST_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_HYST;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_HYST_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_HYST;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_set_BOD12_STDBYCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_STDBYCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline bool hri_supc_get_BOD12_STDBYCFG_bit(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_STDBYCFG) >> SUPC_BOD12_STDBYCFG_Pos;
-	return (bool)tmp;
-}
-
-static inline void hri_supc_write_BOD12_STDBYCFG_bit(const void *const hw, bool value)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_STDBYCFG;
-	tmp |= value << SUPC_BOD12_STDBYCFG_Pos;
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_STDBYCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_STDBYCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_STDBYCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_STDBYCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_set_BOD12_RUNSTDBY_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_RUNSTDBY;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline bool hri_supc_get_BOD12_RUNSTDBY_bit(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_RUNSTDBY) >> SUPC_BOD12_RUNSTDBY_Pos;
-	return (bool)tmp;
-}
-
-static inline void hri_supc_write_BOD12_RUNSTDBY_bit(const void *const hw, bool value)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_RUNSTDBY;
-	tmp |= value << SUPC_BOD12_RUNSTDBY_Pos;
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_RUNSTDBY_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_RUNSTDBY;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_RUNSTDBY_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_RUNSTDBY;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_set_BOD12_ACTCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_ACTCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline bool hri_supc_get_BOD12_ACTCFG_bit(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_ACTCFG) >> SUPC_BOD12_ACTCFG_Pos;
-	return (bool)tmp;
-}
-
-static inline void hri_supc_write_BOD12_ACTCFG_bit(const void *const hw, bool value)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_ACTCFG;
-	tmp |= value << SUPC_BOD12_ACTCFG_Pos;
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_ACTCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_ACTCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_ACTCFG_bit(const void *const hw)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_ACTCFG;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_set_BOD12_ACTION_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_ACTION(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_get_BOD12_ACTION_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_ACTION(mask)) >> SUPC_BOD12_ACTION_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_write_BOD12_ACTION_bf(const void *const hw, hri_supc_bod12_reg_t data)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_ACTION_Msk;
-	tmp |= SUPC_BOD12_ACTION(data);
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_ACTION_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_ACTION(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_ACTION_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_ACTION(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_read_BOD12_ACTION_bf(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_ACTION_Msk) >> SUPC_BOD12_ACTION_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_set_BOD12_PSEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_PSEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_get_BOD12_PSEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_PSEL(mask)) >> SUPC_BOD12_PSEL_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_write_BOD12_PSEL_bf(const void *const hw, hri_supc_bod12_reg_t data)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_PSEL_Msk;
-	tmp |= SUPC_BOD12_PSEL(data);
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_PSEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_PSEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_PSEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_PSEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_read_BOD12_PSEL_bf(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_PSEL_Msk) >> SUPC_BOD12_PSEL_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_set_BOD12_LEVEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= SUPC_BOD12_LEVEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_get_BOD12_LEVEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_LEVEL(mask)) >> SUPC_BOD12_LEVEL_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_write_BOD12_LEVEL_bf(const void *const hw, hri_supc_bod12_reg_t data)
-{
-	uint32_t tmp;
-	SUPC_CRITICAL_SECTION_ENTER();
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= ~SUPC_BOD12_LEVEL_Msk;
-	tmp |= SUPC_BOD12_LEVEL(data);
-	((Supc *)hw)->BOD12.reg = tmp;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_LEVEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~SUPC_BOD12_LEVEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_LEVEL_bf(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= SUPC_BOD12_LEVEL(mask);
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_read_BOD12_LEVEL_bf(const void *const hw)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp = (tmp & SUPC_BOD12_LEVEL_Msk) >> SUPC_BOD12_LEVEL_Pos;
-	return tmp;
-}
-
-static inline void hri_supc_set_BOD12_reg(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg |= mask;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_get_BOD12_reg(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	uint32_t tmp;
-	tmp = ((Supc *)hw)->BOD12.reg;
-	tmp &= mask;
-	return tmp;
-}
-
-static inline void hri_supc_write_BOD12_reg(const void *const hw, hri_supc_bod12_reg_t data)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg = data;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_clear_BOD12_reg(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg &= ~mask;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline void hri_supc_toggle_BOD12_reg(const void *const hw, hri_supc_bod12_reg_t mask)
-{
-	SUPC_CRITICAL_SECTION_ENTER();
-	((Supc *)hw)->BOD12.reg ^= mask;
-	SUPC_CRITICAL_SECTION_LEAVE();
-}
-
-static inline hri_supc_bod12_reg_t hri_supc_read_BOD12_reg(const void *const hw)
-{
-	return ((Supc *)hw)->BOD12.reg;
-}
-
 static inline void hri_supc_set_VREG_ENABLE_bit(const void *const hw)
 {
 	SUPC_CRITICAL_SECTION_ENTER();