change SERCOM clock to 3.3 MHz
we use the SERCOM peripheral for USART (in 7816 mode SIM card
communication) in synchronous mode (TX and RX clock are the same).
in this mode only the 8 least significant bits of the BAUD register
are used (see TRM 33.6.2.3 Clock Generation – Baud-Rate Generator).
When the SERCOM is clocked at 100 MHz the minimum resulting baud
rate would be 100E6 / (2 * 255 + 1) = 195694 bps.
clocking SERCOM at 3.33 MHz also to have a baud rate of 6720 bps
(~ 3.33E6 / (2 * 247 + 1)), used after reset to read the ATR.
Change-Id: Id60322e092a6652a89821fc737d5336d79a1420c
diff --git a/sysmoOCTSIM/config/hpl_gclk_config.h b/sysmoOCTSIM/config/hpl_gclk_config.h
index 6b7586c..71c26e1 100644
--- a/sysmoOCTSIM/config/hpl_gclk_config.h
+++ b/sysmoOCTSIM/config/hpl_gclk_config.h
@@ -226,7 +226,7 @@
//<o> Generic clock generator 2 division <0x0000-0xFFFF>
// <id> gclk_gen_2_div
#ifndef CONF_GCLK_GEN_2_DIV
-#define CONF_GCLK_GEN_2_DIV 1
+#define CONF_GCLK_GEN_2_DIV 30
#endif
// </h>
// </e>
@@ -311,7 +311,7 @@
// <i> Indicates whether generic clock 4 configuration is enabled or not
// <id> enable_gclk_gen_4
#ifndef CONF_GCLK_GENERATOR_4_CONFIG
-#define CONF_GCLK_GENERATOR_4_CONFIG 0
+#define CONF_GCLK_GENERATOR_4_CONFIG 1
#endif
// <h> Generic Clock Generator Control
@@ -328,7 +328,7 @@
// <i> This defines the clock source for generic clock generator 4
// <id> gclk_gen_4_oscillator
#ifndef CONF_GCLK_GEN_4_SOURCE
-#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_XOSC1
+#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_DPLL1
#endif
// <q> Run in Standby
@@ -370,7 +370,7 @@
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
// <id> gclk_arch_gen_4_enable
#ifndef CONF_GCLK_GEN_4_GENEN
-#define CONF_GCLK_GEN_4_GENEN 0
+#define CONF_GCLK_GEN_4_GENEN 1
#endif
// </h>