Fix SystemCoreClock for our use case (120 MHz)
With all the tons of ASF4 library code, ARM/Microchip couldn't even
bothered to implement the most basic CMSIS bits such as the
SystemCoreClockUpdate() function that would dynamically compute
the current SysTick rate at runtime.
To make things worse, they're also not using the #define they have
for the initial core clock rate that's set up at boot time but rather
have a hardcoded 48 MHz value as SystemCoreClock.
Without a correct SystemCoreClock, the jiffies rate is wrong, and
all related timing off.
Change-Id: I9966de4d9ad4e623893044fc341b9852659e8f39
1 file changed