| commit | 293c8417737625ebf5349052eb81aaf776fdfbf2 | [log] [tgz] |
|---|---|---|
| author | Kévin Redon <kredon@sysmocom.de> | Wed Jan 30 11:18:10 2019 +0100 |
| committer | Kévin Redon <kredon@sysmocom.de> | Thu Feb 07 15:56:05 2019 +0100 |
| tree | e77f0a5bbd3fcc78230899101256e7856cd6ae73 | |
| parent | 78d2f44754ad4bf9f7d00ad09d5bf2194f1b2ba7 [diff] |
fix DPLL input clock division Change-Id: I3df1356d36b54d0cc34fd827265b1e4b9d55509f