enable the final slot
The debug uart is shared with slot 7, so in order to use sim slot 7 the
pin config and the uart config needs to be changed. Going back to using
the debug uart works by defining ENABLE_DBG_UART7
Change-Id: I8f3c7c60306941159c35307a5c1e38c2a2bd2fe1
diff --git a/sysmoOCTSIM/atmel_start.c b/sysmoOCTSIM/atmel_start.c
index 6670364..931a09a 100644
--- a/sysmoOCTSIM/atmel_start.c
+++ b/sysmoOCTSIM/atmel_start.c
@@ -14,6 +14,8 @@
system_init();
dma_memory_init();
dma_memory_register_callback(DMA_MEMORY_COMPLETE_CB, M2M_DMA_complete_cb);
-// stdio_redirect_init();
+#ifdef ENABLE_DBG_UART7
+ stdio_redirect_init();
+#endif
usb_init();
}
diff --git a/sysmoOCTSIM/atmel_start_pins.h b/sysmoOCTSIM/atmel_start_pins.h
index 7cbaed5..0c33536 100644
--- a/sysmoOCTSIM/atmel_start_pins.h
+++ b/sysmoOCTSIM/atmel_start_pins.h
@@ -60,6 +60,7 @@
#define SWITCH GPIO(GPIO_PORTC, 14)
#define MUX_STAT GPIO(GPIO_PORTC, 15)
#define SIM6_IO GPIO(GPIO_PORTC, 16)
+#define SIM7_IO GPIO(GPIO_PORTB, 21)
#define USER_LED GPIO(GPIO_PORTC, 26)
#define SCL4 GPIO(GPIO_PORTC, 27)
#define SDA4 GPIO(GPIO_PORTC, 28)
diff --git a/sysmoOCTSIM/command.c b/sysmoOCTSIM/command.c
index 454cd2f..48d8c11 100644
--- a/sysmoOCTSIM/command.c
+++ b/sysmoOCTSIM/command.c
@@ -78,6 +78,7 @@
void command_try_recv(void)
{
+#ifdef ENABLE_DBG_UART7
unsigned int i = 0;
/* yield CPU after maximum of 10 received characters */
@@ -101,6 +102,7 @@
i++;
}
+#endif
}
void command_init(const char *prompt)
diff --git a/sysmoOCTSIM/config/hpl_sercom_config.h b/sysmoOCTSIM/config/hpl_sercom_config.h
index bb2bbff..86b4c0a 100644
--- a/sysmoOCTSIM/config/hpl_sercom_config.h
+++ b/sysmoOCTSIM/config/hpl_sercom_config.h
@@ -1910,6 +1910,8 @@
#include <peripheral_clk_config.h>
+#ifdef ENABLE_DBG_UART7
+
#ifndef CONF_SERCOM_7_USART_ENABLE
#define CONF_SERCOM_7_USART_ENABLE 1
#endif
@@ -2176,7 +2178,281 @@
#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
#endif
#endif
+#else
+#include <peripheral_clk_config.h>
+
+#ifndef CONF_SERCOM_7_USART_ENABLE
+#define CONF_SERCOM_7_USART_ENABLE 1
+#endif
+
+// <h> Basic Configuration
+
+// <q> Receive buffer enable
+// <i> Enable input buffer in SERCOM module
+// <id> usart_rx_enable
+#ifndef CONF_SERCOM_7_USART_RXEN
+#define CONF_SERCOM_7_USART_RXEN 1
+#endif
+
+// <q> Transmitt buffer enable
+// <i> Enable output buffer in SERCOM module
+// <id> usart_tx_enable
+#ifndef CONF_SERCOM_7_USART_TXEN
+#define CONF_SERCOM_7_USART_TXEN 1
+#endif
+
+// <o> Frame parity
+// <0x1=>Even parity
+// <i> Parity bit mode for USART frame
+// <id> usart_parity
+#ifndef CONF_SERCOM_7_USART_PARITY
+#define CONF_SERCOM_7_USART_PARITY 1
+#endif
+
+// <o> Character Size
+// <0x0=>8 bits
+// <0x1=>9 bits
+// <0x5=>5 bits
+// <0x6=>6 bits
+// <0x7=>7 bits
+// <i> Data character size in USART frame
+// <id> usart_character_size
+#ifndef CONF_SERCOM_7_USART_CHSIZE
+#define CONF_SERCOM_7_USART_CHSIZE 0x0
+#endif
+
+// <o> Stop Bit
+// <0=>One stop bit
+// <1=>Two stop bits
+// <i> Number of stop bits in USART frame
+// <id> usart_stop_bit
+#ifndef CONF_SERCOM_7_USART_SBMODE
+#define CONF_SERCOM_7_USART_SBMODE 1
+#endif
+
+// <o> Baud rate <1-3000000>
+// <i> USART baud rate setting
+// <id> usart_baud_rate
+#ifndef CONF_SERCOM_7_USART_BAUD
+#define CONF_SERCOM_7_USART_BAUD 6720
+#endif
+// </h>
+
+// <h> ISO7816 configuration
+// <o> ISO7816 Protocol Type
+// <0x1=> T=0
+// <0x0=> T=1
+// <i> Define ISO7816 protocol type as 0.
+// <id> usart_iso7816_type
+#ifndef CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T
+#define CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T 0x0
+#endif
+
+// <o> ISO7816 Inhibit Not Acknowledge
+// <0x0=> NACK is transmitted when a parity error is received.
+// <0x1=> NACK is not transmitted when a parity error is received.
+// <i> Define whether a NACK is transmitted when a parity error is received.
+// <id> usart_inack
+#ifndef CONF_SERCOM_7_USART_INACK
+#define CONF_SERCOM_7_USART_INACK 0x0
+#endif
+
+// <o> ISO7816 Disable Successive Not Acknowledge
+// <0x0=> The successive receive NACK is disable.
+// <0x1=> The successive receive NACK is enable.
+// <i> Define whether NACK will be sent on parity error reception.
+// <id> usart_dsnack
+#ifndef CONF_SERCOM_7_USART_DSNACK
+#define CONF_SERCOM_7_USART_DSNACK 0x0
+#endif
+
+// <o> ISO7816 Maximum Iterations<0-7>
+// <i> Define the maximum number of retransmit iterations.
+// <id> usart_maxiter
+#ifndef CONF_SERCOM_7_USART_MAXITER
+#define CONF_SERCOM_7_USART_MAXITER 0x7
+#endif
+
+// <o> ISO7816 Guard Time
+// <0x2=> 2-bit times
+// <0x3=> 3-bit times
+// <0x4=> 4-bit times
+// <0x5=> 5-bit times
+// <0x6=> 6-bit times
+// <0x7=> 7-bit times
+// <i> Define the guard time.
+// <id> usart_gtime
+#ifndef CONF_SERCOM_7_USART_GTIME
+#define CONF_SERCOM_7_USART_GTIME 0x2
+#endif
+
+// <q> Inverse transmission and reception enabled
+// <i> Define inverse transmission and reception enabled.
+// <id> usart_inverse_enabled
+#ifndef CONF_SERCOM_7_USART_INVERSE_ENABLED
+#define CONF_SERCOM_7_USART_INVERSE_ENABLED 0x0
+#endif
+
+#if (CONF_SERCOM_7_USART_INVERSE_ENABLED == 1)
+#define CONF_SERCOM_7_USART_RXINV 0x1
+#define CONF_SERCOM_7_USART_TXINV 0x1
+#else
+#define CONF_SERCOM_7_USART_RXINV 0x0
+#define CONF_SERCOM_7_USART_TXINV 0x0
+#endif
+
+// </h>
+
+// <e> Advanced configuration
+// <id> usart_advanced
+#ifndef CONF_SERCOM_7_USART_ADVANCED_CONFIG
+#define CONF_SERCOM_7_USART_ADVANCED_CONFIG 0
+#endif
+
+// <q> Run in stand-by
+// <i> Keep the module running in standby sleep mode
+// <id> usart_arch_runstdby
+#ifndef CONF_SERCOM_7_USART_RUNSTDBY
+#define CONF_SERCOM_7_USART_RUNSTDBY 0
+#endif
+
+// <q> Immediate Buffer Overflow Notification
+// <i> Controls when the BUFOVF status bit is asserted
+// <id> usart_arch_ibon
+#ifndef CONF_SERCOM_7_USART_IBON
+#define CONF_SERCOM_7_USART_IBON 0
+#endif
+
+// <q> Start of Frame Detection Enable
+// <i> Will wake the device from any sleep mode if usart_init and usart_enable was run priort to going to sleep. (receive buffer must be enabled)
+// <id> usart_arch_sfde
+#ifndef CONF_SERCOM_7_USART_SFDE
+#define CONF_SERCOM_7_USART_SFDE 0
+#endif
+
+// <q> Collision Detection Enable
+// <i> Collision detection enable
+// <id> usart_arch_cloden
+#ifndef CONF_SERCOM_7_USART_CLODEN
+#define CONF_SERCOM_7_USART_CLODEN 0
+#endif
+
+// <o> Operating Mode
+// <0x1=>USART with internal clock
+// <i> Drive the shift register by an internal clock generated by the baud rate generator.
+// <id> usart_arch_clock_mode
+#ifndef CONF_SERCOM_7_USART_MODE
+#define CONF_SERCOM_7_USART_MODE 0x1
+#endif
+
+// <o> Data Order
+// <0=>MSB is transmitted first
+// <1=>LSB is transmitted first
+// <i> Data order of the data bits in the frame
+// <id> usart_arch_dord
+#ifndef CONF_SERCOM_7_USART_DORD
+#define CONF_SERCOM_7_USART_DORD 1
+#endif
+
+// <o> Debug Stop Mode
+// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
+// <0=>Keep running
+// <1=>Halt
+// <id> usart_arch_dbgstop
+#ifndef CONF_SERCOM_7_USART_DEBUG_STOP_MODE
+#define CONF_SERCOM_7_USART_DEBUG_STOP_MODE 0
+#endif
+
+// Does not do anything in USRT mode
+#define CONF_SERCOM_7_USART_SAMPR 0x0
+#define CONF_SERCOM_7_USART_SAMPA 0x0
+#define CONF_SERCOM_7_USART_FRACTIONAL 0x0
+
+// Does not do anything in UART mode
+#define CONF_SERCOM_7_USART_CPOL 0
+
+// Does not do anything in USRT mode
+#define CONF_SERCOM_7_USART_ENC 0
+
+// </e>
+
+#ifndef CONF_SERCOM_7_USART_CMODE
+#define CONF_SERCOM_7_USART_CMODE CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T
+#endif
+
+/* RX is on PIN_PC16 */
+#ifndef CONF_SERCOM_7_USART_RXPO
+#define CONF_SERCOM_7_USART_RXPO 0
+#endif
+
+/* TX uses the same pin with RX */
+#ifndef CONF_SERCOM_7_USART_TXPO
+#define CONF_SERCOM_7_USART_TXPO 2
+#endif
+
+/* Set iso7816 mode */
+#define CONF_SERCOM_7_USART_PMODE (CONF_SERCOM_7_USART_PARITY - 1)
+#define CONF_SERCOM_7_USART_FORM 7
+
+#if CONF_SERCOM_7_USART_CMODE == 0
+// Calculate BAUD register value in UART mode
+#if CONF_SERCOM_7_USART_SAMPR == 0
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+#define CONF_SERCOM_7_USART_BAUD_RATE \
+ 65536 - ((65536 * 16.0f * CONF_SERCOM_7_USART_BAUD) / CONF_GCLK_SERCOM7_CORE_FREQUENCY)
+#endif
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#elif CONF_SERCOM_7_USART_SAMPR == 1
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+#define CONF_SERCOM_7_USART_BAUD_RATE \
+ ((CONF_GCLK_SERCOM7_CORE_FREQUENCY) / (CONF_SERCOM_7_USART_BAUD * 16)) - (CONF_SERCOM_7_USART_FRACTIONAL / 8)
+#endif
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#elif CONF_SERCOM_7_USART_SAMPR == 2
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+#define CONF_SERCOM_7_USART_BAUD_RATE \
+ 65536 - ((65536 * 8.0f * CONF_SERCOM_7_USART_BAUD) / CONF_GCLK_SERCOM7_CORE_FREQUENCY)
+#endif
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#elif CONF_SERCOM_7_USART_SAMPR == 3
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+#define CONF_SERCOM_7_USART_BAUD_RATE \
+ ((CONF_GCLK_SERCOM7_CORE_FREQUENCY) / (CONF_SERCOM_7_USART_BAUD * 8)) - (CONF_SERCOM_7_USART_FRACTIONAL / 8)
+#endif
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#elif CONF_SERCOM_7_USART_SAMPR == 4
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+#define CONF_SERCOM_7_USART_BAUD_RATE \
+ 65536 - ((65536 * 3.0f * CONF_SERCOM_7_USART_BAUD) / CONF_GCLK_SERCOM7_CORE_FREQUENCY)
+#endif
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#endif
+
+#elif CONF_SERCOM_7_USART_CMODE == 1
+#ifndef CONF_SERCOM_7_USART_BAUD_RATE
+// Calculate BAUD register value in USRT mode
+#define CONF_SERCOM_7_USART_BAUD_RATE (CONF_GCLK_SERCOM7_CORE_FREQUENCY) / (2 * CONF_SERCOM_7_USART_BAUD) - 1
+#endif
+
+#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH
+#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0
+#endif
+#else
+#error CMODE value for SERCOM 7 in USART mode not known
+#endif
+
+#endif
// <<< end of configuration section >>>
#endif // HPL_SERCOM_CONFIG_H
diff --git a/sysmoOCTSIM/cuart_driver_asf4_usart_async.c b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
index c7d29eb..87f5123 100644
--- a/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
+++ b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
@@ -13,7 +13,11 @@
#include "cuart.h"
+#ifndef ENABLE_DBG_UART7
+static struct usart_async_descriptor* SIM_peripheral_descriptors[] = {&SIM0, &SIM1, &SIM2, &SIM3, &SIM4, &SIM5, &SIM6, &SIM7};
+#else
static struct usart_async_descriptor* SIM_peripheral_descriptors[] = {&SIM0, &SIM1, &SIM2, &SIM3, &SIM4, &SIM5, &SIM6, NULL};
+#endif
extern struct card_uart *cuart4slot_nr(uint8_t slot_nr);
diff --git a/sysmoOCTSIM/driver_init.c b/sysmoOCTSIM/driver_init.c
index 7071ea5..1cfd8cf 100644
--- a/sysmoOCTSIM/driver_init.c
+++ b/sysmoOCTSIM/driver_init.c
@@ -33,7 +33,11 @@
#define SIM6_BUFFER_SIZE 512
/*! The buffer size for USART */
+#ifdef ENABLE_DBG_UART7
#define UART_DEBUG_BUFFER_SIZE 4096
+#else
+#define SIM7_BUFFER_SIZE 512
+#endif
struct usart_async_descriptor SIM0;
struct usart_async_descriptor SIM1;
@@ -42,6 +46,9 @@
struct usart_async_descriptor SIM4;
struct usart_async_descriptor SIM5;
struct usart_async_descriptor SIM6;
+#ifndef ENABLE_DBG_UART7
+struct usart_async_descriptor SIM7;
+#endif
static uint8_t SIM0_buffer[SIM0_BUFFER_SIZE];
static uint8_t SIM1_buffer[SIM1_BUFFER_SIZE];
@@ -50,12 +57,14 @@
static uint8_t SIM4_buffer[SIM4_BUFFER_SIZE];
static uint8_t SIM5_buffer[SIM5_BUFFER_SIZE];
static uint8_t SIM6_buffer[SIM6_BUFFER_SIZE];
-
+#ifndef ENABLE_DBG_UART7
+static uint8_t SIM7_buffer[SIM7_BUFFER_SIZE];
+#else
struct usart_async_rings_descriptor UART_debug;
-struct calendar_descriptor CALENDAR_0;
-
static uint8_t UART_DEBUG_buffer_rx[UART_DEBUG_BUFFER_SIZE];
static uint8_t UART_DEBUG_buffer_tx[UART_DEBUG_BUFFER_SIZE];
+#endif
+struct calendar_descriptor CALENDAR_0;
void CALENDAR_0_CLOCK_init(void)
{
@@ -327,6 +336,7 @@
SIM6_PORT_init();
}
+#ifdef ENABLE_DBG_UART7
/**
* \brief USART Clock initialization function
*
@@ -365,7 +375,44 @@
usart_async_rings_init(&UART_debug, SERCOM7, UART_DEBUG_buffer_rx, UART_DEBUG_BUFFER_SIZE, UART_DEBUG_buffer_tx, UART_DEBUG_BUFFER_SIZE, (void *)NULL);
UART_debug_PORT_init();
}
+#else
+/**
+ * \brief USART Clock initialization function
+ *
+ * Enables register interface and peripheral clock
+ */
+void SIM7_CLOCK_init()
+{
+ hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
+ hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
+
+ hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
+}
+
+/**
+ * \brief USART pinmux initialization function
+ *
+ * Set each required pin to USART functionality
+ */
+void SIM7_PORT_init()
+{
+
+ gpio_set_pin_function(SIM7_IO, PINMUX_PB21D_SERCOM7_PAD0);
+}
+
+/**
+ * \brief USART initialization function
+ *
+ * Enables USART peripheral, clocks and initializes USART driver
+ */
+void SIM7_init(void)
+{
+ SIM7_CLOCK_init();
+ usart_async_init(&SIM7, SERCOM7, SIM7_buffer, SIM7_BUFFER_SIZE, (void *)NULL);
+ SIM7_PORT_init();
+}
+#endif
void USB_DEVICE_INSTANCE_PORT_init(void)
{
@@ -923,8 +970,11 @@
SIM4_init();
SIM5_init();
SIM6_init();
-
+#ifndef ENABLE_DBG_UART7
+ SIM7_init();
+#else
UART_debug_init();
+#endif
USB_DEVICE_INSTANCE_init();
}
diff --git a/sysmoOCTSIM/driver_init.h b/sysmoOCTSIM/driver_init.h
index de5e441..f9d23b7 100644
--- a/sysmoOCTSIM/driver_init.h
+++ b/sysmoOCTSIM/driver_init.h
@@ -36,7 +36,11 @@
extern struct usart_async_descriptor SIM4;
extern struct usart_async_descriptor SIM5;
extern struct usart_async_descriptor SIM6;
+#ifdef ENABLE_DBG_UART7
extern struct usart_async_rings_descriptor UART_debug;
+#else
+extern struct usart_async_descriptor SIM7;
+#endif
void CALENDAR_0_CLOCK_init(void);
void CALENDAR_0_init(void);
@@ -69,6 +73,10 @@
void SIM6_CLOCK_init(void);
void SIM6_init(void);
+void SIM7_PORT_init(void);
+void SIM7_CLOCK_init(void);
+void SIM7_init(void);
+
void UART_debug_PORT_init(void);
void UART_debug_CLOCK_init(void);
void UART_debug_init(void);
diff --git a/sysmoOCTSIM/gcc/Makefile b/sysmoOCTSIM/gcc/Makefile
index 95a582f..7a37036 100644
--- a/sysmoOCTSIM/gcc/Makefile
+++ b/sysmoOCTSIM/gcc/Makefile
@@ -126,7 +126,6 @@
i2c_bitbang.o \
libosmo_emb.o \
main.o \
- manual_test.o \
ncn8025.o \
octsim_i2c.o \
stdio_redirect/gcc/read.o \
diff --git a/sysmoOCTSIM/libosmo_emb.c b/sysmoOCTSIM/libosmo_emb.c
index a12c490..81b29e3 100644
--- a/sysmoOCTSIM/libosmo_emb.c
+++ b/sysmoOCTSIM/libosmo_emb.c
@@ -157,7 +157,7 @@
#endif
/* logging */
log_init(&log_info, g_tall_ctx);
-#if 0
+#ifdef ENABLE_DBG_UART7
stderr_target = log_target_create_stderr_raw();
log_add_target(stderr_target);
log_set_all_filter(stderr_target, 1);
diff --git a/sysmoOCTSIM/main.c b/sysmoOCTSIM/main.c
index c73b715..e3d7034 100644
--- a/sysmoOCTSIM/main.c
+++ b/sysmoOCTSIM/main.c
@@ -435,7 +435,7 @@
//#######################
-#define NUM_OUT_BUF 7
+#define NUM_OUT_BUF 16
int main(void)
{
@@ -529,7 +529,7 @@
command_try_recv();
poll_card_detect();
submit_next_irq();
- for (int i = 0; i < usb_fs_descs.ccid.class.bMaxSlotIndex; i++){
+ for (int i = 0; i <= usb_fs_descs.ccid.class.bMaxSlotIndex; i++){
g_ci.slot_ops->handle_fsm_events(&g_ci.slot[i], true);
}
feed_ccid();
diff --git a/sysmoOCTSIM/manual_test.c b/sysmoOCTSIM/manual_test.c
deleted file mode 100644
index d6852bc..0000000
--- a/sysmoOCTSIM/manual_test.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright (C) 2019 Harald Welte <laforge@gnumonks.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
-*/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <parts.h>
-
-#include "atmel_start.h"
-#include "atmel_start_pins.h"
-
-#include "i2c_bitbang.h"
-#include "octsim_i2c.h"
-#include "ncn8025.h"
-
-#include "command.h"
-
-enum testmode_test {
- TEST_USER_LED,
- /* test the per-slot LED by blinking it shortly */
- TEST_LED,
- /* test the voltages of the SIMVCC */
- TEST_VOLTAGE,
- /* test the clock rates of the SIMCLK pin */
- TEST_CLOCK,
- /* test the RST line by asserting it low and then back high */
- TEST_RST,
- /* test the RST line by asserting it low and then back high */
- TEST_IO,
- _NUM_TESTS
-};
-static const char *test_names[_NUM_TESTS] = {
- [TEST_USER_LED] = "USER_LED",
- [TEST_LED] = "LED",
- [TEST_VOLTAGE] = "VOLTAGE",
- [TEST_CLOCK] = "CLOCK",
- [TEST_RST] = "RST",
- [TEST_IO] = "IO",
-};
-
-struct testmode_state {
- uint8_t slot;
- enum testmode_test test_nr;
- int test_int;
- struct ncn8025_settings ncn;
-};
-static struct testmode_state g_tms;
-
-#define BLINK_MS 500
-
-static void set_slot(uint8_t slot)
-{
- printf("changing slot to %u\r\n", slot);
- g_tms.slot = slot;
- g_tms.ncn = (struct ncn8025_settings) {
- .rstin = false,
- .cmdvcc = false,
- .led = false,
- .clkdiv = SIM_CLKDIV_8,
- .vsel = SIM_VOLT_3V0,
- };
- ncn8025_set(g_tms.slot, &g_tms.ncn);
- ncn8025_get(g_tms.slot, &g_tms.ncn);
-}
-
-static void next_test(void)
-{
- g_tms.test_nr = (g_tms.test_nr + 1) % _NUM_TESTS;
- g_tms.test_int = 0;
- printf("changing test to %s\r\n", test_names[g_tms.test_nr]);
-}
-
-static void test_user_led(void)
-{
- printf("blinking User LED\r\n");
-
- gpio_set_pin_function(PIN_PC26, GPIO_PIN_FUNCTION_OFF);
- gpio_set_pin_direction(PIN_PC26, GPIO_DIRECTION_OUT);
- gpio_set_pin_level(PIN_PC26, true);
- delay_ms(BLINK_MS);
- gpio_set_pin_level(PIN_PC26, false);
-}
-
-static void test_led(void)
-{
- printf("blinking Slot LED\r\n");
-
- g_tms.ncn.led = true;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
- delay_ms(BLINK_MS);
- g_tms.ncn.led = false;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
-}
-
-static enum ncn8025_sim_voltage voltage[3] = { SIM_VOLT_1V8, SIM_VOLT_3V0, SIM_VOLT_5V0 };
-static const char *voltage_name[3] = { "1.8", "3.0", "5.0" };
-
-static void ncn_change_voltage(enum ncn8025_sim_voltage vsel)
-{
- /* first disable the output; VSEL changes require output to be disabled */
- g_tms.ncn.cmdvcc = false;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
-
- /* then re-enable it with the new voltage setting */
- g_tms.ncn.vsel = vsel;
- g_tms.ncn.cmdvcc = true;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
-}
-
-static void test_voltage(void)
-{
- printf("Testing Voltage %s\r\n", voltage_name[g_tms.test_int]);
-
- ncn_change_voltage(voltage[g_tms.test_int]);
- g_tms.test_int = (g_tms.test_int+1) % 3;
-}
-
-static enum ncn8025_sim_clkdiv clk_div[4] = { SIM_CLKDIV_8, SIM_CLKDIV_4, SIM_CLKDIV_2, SIM_CLKDIV_1 };
-static const uint8_t clk_div_val[4] = { 8, 4, 2, 1 };
-
-static void test_clock(void)
-{
- printf("Testing Clock Divider %u\r\n", clk_div_val[g_tms.test_int]);
- g_tms.ncn.cmdvcc = true;
- g_tms.ncn.clkdiv = clk_div[g_tms.test_int];
- ncn8025_set(g_tms.slot, &g_tms.ncn);
- g_tms.test_int = (g_tms.test_int+1) % 4;
-}
-
-static void test_rst(void)
-{
- printf("blinking RST\r\n");
-
- /* well-defined voltage for LED brightness */
- ncn_change_voltage(SIM_VOLT_3V0);
-
- g_tms.ncn.cmdvcc = true;
- g_tms.ncn.rstin = true;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
-
- delay_ms(BLINK_MS);
-
- g_tms.ncn.rstin = false;
- ncn8025_set(g_tms.slot, &g_tms.ncn);
-}
-
-#ifndef SIM7_IO
-#define SIM7_IO PIN_PB21
-#endif
-static const enum gpio_port sim_io_gpio[] = { SIM0_IO, SIM1_IO, SIM2_IO, SIM3_IO,
- SIM4_IO, SIM5_IO, SIM6_IO, SIM7_IO };
-
-static void test_io(void)
-{
- enum gpio_port gpio = sim_io_gpio[g_tms.slot];
- printf("blinking I/O\r\n");
-
- /* well-defined voltage for LED brightness */
- ncn_change_voltage(SIM_VOLT_3V0);
-
- gpio_set_pin_function(gpio, GPIO_PIN_FUNCTION_OFF);
- gpio_set_pin_direction(gpio, GPIO_DIRECTION_OUT);
- gpio_set_pin_level(gpio, false);
- delay_ms(BLINK_MS);
- gpio_set_pin_level(gpio, true);
-
- /* FIXME: restore tack to original function! */
- //gpio_set_pin_function(sim_io_gpio[g_tms.slot], GPIO_PIN_FUNCTION_OFF);
-}
-
-typedef void (*test_fn)(void);
-static const test_fn test_functions[_NUM_TESTS] = {
- [TEST_USER_LED] = test_user_led,
- [TEST_LED] = test_led,
- [TEST_VOLTAGE] = test_voltage,
- [TEST_CLOCK] = test_clock,
- [TEST_RST] = test_rst,
- [TEST_IO] = test_io,
-};
-
-static void execute_test(void)
-{
- printf("(%u) %-10s: ", g_tms.slot, test_names[g_tms.test_nr]);
- test_functions[g_tms.test_nr]();
-}
-
-static int wait_for_key_and_process(void)
-{
- int c;
-
- do {
- } while (!usart_async_rings_is_rx_not_empty(&UART_debug));
-
- c = getchar();
- if (c < 0)
- return -1;
-
- switch (c) {
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- set_slot(c - '0');
- execute_test();
- break;
- case 'n':
- case 'N':
- next_test();
- execute_test();
- break;
- case 'Q':
- case 'q':
- printf("Leaving Test Mode\r\n");
- return -1;
- case ' ':
- execute_test();
- break;
- }
- return 0;
-}
-
-DEFUN(testmode_fn, cmd_testmode,
- "testmode", "Enter board testing mode (Use `Q` to exit)")
-{
- printf("Manual test mode. 'Q': exit, 'N': next test, SPACE: re-run, '0'-'7': slot\r\n");
-
- printf("SPACE will start the current test (%s)\r\n", test_names[g_tms.test_nr]);
- while (1) {
- if (wait_for_key_and_process() < 0)
- break;
- }
-}
-
-void testmode_init(void)
-{
- command_register(&cmd_testmode);
-}
diff --git a/sysmoOCTSIM/stdio_start.c b/sysmoOCTSIM/stdio_start.c
index 8a15c88..63e125d 100644
--- a/sysmoOCTSIM/stdio_start.c
+++ b/sysmoOCTSIM/stdio_start.c
@@ -9,6 +9,7 @@
#include "atmel_start.h"
#include "stdio_start.h"
+#ifdef ENABLE_DBG_UART7
static void UART_debug_rx_cb(const struct usart_async_rings_descriptor *const io_descr)
{
}
@@ -19,3 +20,4 @@
usart_async_rings_enable(&UART_debug);
stdio_io_init(&UART_debug.io);
}
+#endif