| commit | 20abc4f441a4d5c5f25967fc34dfef7044284a17 | [log] [tgz] |
|---|---|---|
| author | Kévin Redon <kredon@sysmocom.de> | Thu Jan 24 17:32:17 2019 +0100 |
| committer | Kévin Redon <kredon@sysmocom.de> | Thu Feb 07 15:56:04 2019 +0100 |
| tree | 2ce9b113850fabd18b3059ac81fc2a5a529985a2 | |
| parent | 6b9363ca8e161dbd2922058340df576465eb7439 [diff] |
set DPLL1 to 100 MHz use GCLK11 to bring external crystal oscillator XOSC1 from 12 MHz to 2MHz use DPLL1 to multiply 2 MHz to 100 MHz. the division is first needed because the DPLL0 maximum input frequency is 3.2 MHz 100 MHz is the maximum input frequency for the SERCOM peripherals Change-Id: I0482c39cc0db999904c585d21738dbce57ca3b55