Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 1 | Testing generation of GSM0808 messages |
| 2 | Testing creating Layer3 |
Philipp Maier | fa896ab | 2017-03-27 16:55:32 +0200 | [diff] [blame] | 3 | Testing creating Layer3 (AoIP) |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 4 | Testing creating Reset |
Philipp Maier | 15596e2 | 2017-04-05 17:55:27 +0200 | [diff] [blame] | 5 | Testing creating Reset Ack |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 6 | Testing creating Clear Command |
| 7 | Testing creating Clear Complete |
Philipp Maier | b478dd3 | 2017-03-29 15:50:05 +0200 | [diff] [blame] | 8 | Testing creating Chipher Mode Command |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 9 | Testing creating Cipher Complete |
| 10 | Testing creating Cipher Reject |
Max | ed651d2 | 2018-11-07 15:25:05 +0100 | [diff] [blame] | 11 | Testing creating Cipher Reject (extended) |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 12 | Testing creating CM U |
| 13 | Testing creating SAPI Reject |
Philipp Maier | c6144a2 | 2017-03-29 17:53:43 +0200 | [diff] [blame] | 14 | Testing creating Assignment Request |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 15 | Testing creating Assignment Complete |
Philipp Maier | fa896ab | 2017-03-27 16:55:32 +0200 | [diff] [blame] | 16 | Testing creating Assignment Complete (AoIP) |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 17 | Testing creating Assignment Failure |
Philipp Maier | fa896ab | 2017-03-27 16:55:32 +0200 | [diff] [blame] | 18 | Testing creating Assignment Failure (AoIP) |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 19 | Testing creating Clear Request |
Philipp Maier | 3d48ec0 | 2017-03-29 17:37:55 +0200 | [diff] [blame] | 20 | Testing creating Paging Request |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 21 | Testing creating DTAP |
| 22 | Testing prepend DTAP |
Neels Hofmeyr | db2fa4e | 2018-04-13 04:11:20 +0200 | [diff] [blame] | 23 | test_gsm0808_enc_dec_cell_id_list_lac: encoded: 1a 07 05 01 24 ab cd 56 78 (rc = 9) |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 24 | ------- test_cell_id_list_add |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 25 | cell_id_list == CGI[0]:{} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 26 | gsm0808_cell_id_list_add(&cil, &lac1) --> rc = 1 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 27 | cell_id_list == LAC[1]:{123} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 28 | gsm0808_cell_id_list_add(&cil, &lac1) --> rc = 0 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 29 | cell_id_list == LAC[1]:{123} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 30 | gsm0808_cell_id_list_add(&cil, &lac2) --> rc = 2 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 31 | cell_id_list == LAC[3]:{123, 456, 789} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 32 | gsm0808_cell_id_list_add(&cil, &lac2) --> rc = 0 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 33 | cell_id_list == LAC[3]:{123, 456, 789} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 34 | gsm0808_cell_id_list_add(&cil, &cil) --> rc = 0 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 35 | cell_id_list == LAC[3]:{123, 456, 789} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 36 | gsm0808_cell_id_list_add(&cil, &cgi1) --> rc = -22 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 37 | cell_id_list == LAC[3]:{123, 456, 789} |
| 38 | * can't add to BSS list |
| 39 | cell_id_list == BSS[0] |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 40 | gsm0808_cell_id_list_add(&cil, &lac1) --> rc = -22 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 41 | cell_id_list == BSS[0] |
| 42 | * other types (including NO_CELL) take on new type iff empty |
| 43 | cell_id_list == NO-CELL[0] |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 44 | gsm0808_cell_id_list_add(&cil, &cgi1) --> rc = 1 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 45 | cell_id_list == CGI[1]:{001-02-3-4} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 46 | gsm0808_cell_id_list_add(&cil, &cgi1) --> rc = 0 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 47 | cell_id_list == CGI[1]:{001-02-3-4} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 48 | gsm0808_cell_id_list_add(&cil, &cgi2) --> rc = 2 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 49 | cell_id_list == CGI[3]:{001-02-3-4, 001-002-3-4, 005-006-7-8} |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 50 | gsm0808_cell_id_list_add(&cil, &cgi2) --> rc = 0 |
Neels Hofmeyr | a4399c8 | 2018-04-17 02:26:10 +0200 | [diff] [blame] | 51 | cell_id_list == CGI[3]:{001-02-3-4, 001-002-3-4, 005-006-7-8} |
| 52 | * test gsm0808_cell_id_list_name_buf()'s return val |
| 53 | strlen(gsm0808_cell_id_list_name(cil)) == 45 |
| 54 | gsm0808_cell_id_list_name_buf(buf, 46, cil)) == 45 "CGI[3]:{001-02-3-4, 001-002-3-4, 005-006-7-8}" |
| 55 | gsm0808_cell_id_list_name_buf(buf, 23, cil)) == 45 "CGI[3]:{001-02-3-4, 00" |
| 56 | gsm0808_cell_id_list_name_buf(buf, 11, cil)) == 45 "CGI[3]:{00" |
| 57 | gsm0808_cell_id_list_name_buf(buf, 5, cil)) == 45 "CGI[" |
| 58 | gsm0808_cell_id_list_name_buf(buf, 2, cil)) == 45 "C" |
| 59 | gsm0808_cell_id_list_name_buf(buf, 1, cil)) == 45 "" |
| 60 | gsm0808_cell_id_list_name_buf(buf, 0, cil)) == 45 "#" |
| 61 | * list-full behavior |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 62 | cil.id_list_len = 126 |
| 63 | gsm0808_cell_id_list_add(&cil, &cgi2a) --> rc = 1 |
| 64 | cil.id_list_len = 127 |
Neels Hofmeyr | 74663d9 | 2018-03-23 01:46:42 +0100 | [diff] [blame] | 65 | cil.id_list_len = 126 |
| 66 | gsm0808_cell_id_list_add(&cil, &cgi3) --> rc = -28 |
| 67 | cil.id_list_len = 127 |
| 68 | gsm0808_cell_id_list_add(&cil, &cgi2a) --> rc = -28 |
| 69 | cil.id_list_len = 127 |
| 70 | ------- test_cell_id_list_add done |
Neels Hofmeyr | 250e7f7 | 2018-04-13 03:30:14 +0200 | [diff] [blame] | 71 | test_gsm0808_enc_dec_cell_id_lac: encoded: 05 03 05 01 24 (rc = 5) |
| 72 | test_gsm0808_enc_dec_cell_id_bss: encoded: 05 01 06 (rc = 3) |
| 73 | test_gsm0808_enc_dec_cell_id_no_cell: encoded: 05 01 03 (rc = 3) |
| 74 | test_gsm0808_enc_dec_cell_id_lai_and_lac: encoded: 05 06 04 21 63 54 23 42 (rc = 8) |
| 75 | test_gsm0808_enc_dec_cell_id_ci: encoded: 05 03 02 04 23 (rc = 5) |
| 76 | test_gsm0808_enc_dec_cell_id_lac_and_ci: encoded: 05 05 01 04 23 02 35 (rc = 7) |
| 77 | test_gsm0808_enc_dec_cell_id_global: encoded: 05 08 00 21 63 54 23 42 04 23 (rc = 10) |
Philipp Maier | 5f2eb15 | 2018-09-19 13:40:21 +0200 | [diff] [blame] | 78 | Testing gsm0808_sc_cfg_from_gsm48_mr_cfg(): |
| 79 | Input: |
| 80 | m4_75= 0 smod= 0 |
| 81 | m5_15= 0 spare= 0 |
| 82 | m5_90= 0 icmi= 0 |
| 83 | m6_70= 0 nscb= 0 |
| 84 | m7_40= 0 ver= 0 |
| 85 | m7_95= 0 |
| 86 | m10_2= 0 |
| 87 | m12_2= 0 |
| 88 | Result (fr): |
| 89 | S15-S0 = 0000 = 0b0000000000000000 |
| 90 | Result (hr): |
| 91 | S15-S0 = 0000 = 0b0000000000000000 |
| 92 | |
| 93 | Input: |
| 94 | m4_75= 1 smod= 0 |
| 95 | m5_15= 0 spare= 0 |
| 96 | m5_90= 0 icmi= 0 |
| 97 | m6_70= 0 nscb= 0 |
| 98 | m7_40= 0 ver= 0 |
| 99 | m7_95= 0 |
| 100 | m10_2= 0 |
| 101 | m12_2= 0 |
| 102 | Result (fr): |
| 103 | S15-S0 = 5703 = 0b0101011100000011 |
| 104 | Result (hr): |
| 105 | S15-S0 = 0703 = 0b0000011100000011 |
| 106 | |
| 107 | Input: |
| 108 | m4_75= 0 smod= 0 |
| 109 | m5_15= 1 spare= 0 |
| 110 | m5_90= 0 icmi= 0 |
| 111 | m6_70= 0 nscb= 0 |
| 112 | m7_40= 0 ver= 0 |
| 113 | m7_95= 0 |
| 114 | m10_2= 0 |
| 115 | m12_2= 0 |
| 116 | Result (fr): |
| 117 | S15-S0 = 0000 = 0b0000000000000000 |
| 118 | Result (hr): |
| 119 | S15-S0 = 0000 = 0b0000000000000000 |
| 120 | |
| 121 | Input: |
| 122 | m4_75= 0 smod= 0 |
| 123 | m5_15= 0 spare= 0 |
| 124 | m5_90= 1 icmi= 0 |
| 125 | m6_70= 0 nscb= 0 |
| 126 | m7_40= 0 ver= 0 |
| 127 | m7_95= 0 |
| 128 | m10_2= 0 |
| 129 | m12_2= 0 |
| 130 | Result (fr): |
| 131 | S15-S0 = 5706 = 0b0101011100000110 |
| 132 | Result (hr): |
| 133 | S15-S0 = 0706 = 0b0000011100000110 |
| 134 | |
| 135 | Input: |
| 136 | m4_75= 0 smod= 0 |
| 137 | m5_15= 0 spare= 0 |
| 138 | m5_90= 0 icmi= 0 |
| 139 | m6_70= 1 nscb= 0 |
| 140 | m7_40= 0 ver= 0 |
| 141 | m7_95= 0 |
| 142 | m10_2= 0 |
| 143 | m12_2= 0 |
| 144 | Result (fr): |
| 145 | S15-S0 = 1608 = 0b0001011000001000 |
| 146 | Result (hr): |
| 147 | S15-S0 = 0608 = 0b0000011000001000 |
| 148 | |
| 149 | Input: |
| 150 | m4_75= 0 smod= 0 |
| 151 | m5_15= 0 spare= 0 |
| 152 | m5_90= 0 icmi= 0 |
| 153 | m6_70= 0 nscb= 0 |
| 154 | m7_40= 1 ver= 0 |
| 155 | m7_95= 0 |
| 156 | m10_2= 0 |
| 157 | m12_2= 0 |
| 158 | Result (fr): |
| 159 | S15-S0 = 0412 = 0b0000010000010010 |
| 160 | Result (hr): |
| 161 | S15-S0 = 0412 = 0b0000010000010010 |
| 162 | |
| 163 | Input: |
| 164 | m4_75= 0 smod= 0 |
| 165 | m5_15= 0 spare= 0 |
| 166 | m5_90= 0 icmi= 0 |
| 167 | m6_70= 0 nscb= 0 |
| 168 | m7_40= 0 ver= 0 |
| 169 | m7_95= 1 |
| 170 | m10_2= 0 |
| 171 | m12_2= 0 |
| 172 | Result (fr): |
| 173 | S15-S0 = 4020 = 0b0100000000100000 |
| 174 | Result (hr): |
| 175 | S15-S0 = 0020 = 0b0000000000100000 |
| 176 | |
| 177 | Input: |
| 178 | m4_75= 0 smod= 0 |
| 179 | m5_15= 0 spare= 0 |
| 180 | m5_90= 0 icmi= 0 |
| 181 | m6_70= 0 nscb= 0 |
| 182 | m7_40= 0 ver= 0 |
| 183 | m7_95= 0 |
| 184 | m10_2= 1 |
| 185 | m12_2= 0 |
| 186 | Result (fr): |
| 187 | S15-S0 = 1040 = 0b0001000001000000 |
| 188 | Result (hr): |
| 189 | S15-S0 = 0000 = 0b0000000000000000 |
| 190 | |
| 191 | Input: |
| 192 | m4_75= 0 smod= 0 |
| 193 | m5_15= 0 spare= 0 |
| 194 | m5_90= 0 icmi= 0 |
| 195 | m6_70= 0 nscb= 0 |
| 196 | m7_40= 0 ver= 0 |
| 197 | m7_95= 0 |
| 198 | m10_2= 0 |
| 199 | m12_2= 1 |
| 200 | Result (fr): |
| 201 | S15-S0 = 4082 = 0b0100000010000010 |
| 202 | Result (hr): |
| 203 | S15-S0 = 0002 = 0b0000000000000010 |
| 204 | |
| 205 | Input: |
| 206 | m4_75= 1 smod= 0 |
| 207 | m5_15= 1 spare= 0 |
| 208 | m5_90= 1 icmi= 0 |
| 209 | m6_70= 1 nscb= 0 |
| 210 | m7_40= 0 ver= 0 |
| 211 | m7_95= 0 |
| 212 | m10_2= 0 |
| 213 | m12_2= 0 |
| 214 | Result (fr): |
| 215 | S15-S0 = 570f = 0b0101011100001111 |
| 216 | Result (hr): |
| 217 | S15-S0 = 070f = 0b0000011100001111 |
| 218 | |
| 219 | Input: |
| 220 | m4_75= 0 smod= 0 |
| 221 | m5_15= 0 spare= 0 |
| 222 | m5_90= 0 icmi= 0 |
| 223 | m6_70= 0 nscb= 0 |
| 224 | m7_40= 1 ver= 0 |
| 225 | m7_95= 1 |
| 226 | m10_2= 1 |
| 227 | m12_2= 1 |
| 228 | Result (fr): |
| 229 | S15-S0 = 54f2 = 0b0101010011110010 |
| 230 | Result (hr): |
| 231 | S15-S0 = 0432 = 0b0000010000110010 |
| 232 | |
| 233 | Input: |
| 234 | m4_75= 0 smod= 0 |
| 235 | m5_15= 0 spare= 0 |
| 236 | m5_90= 1 icmi= 0 |
| 237 | m6_70= 1 nscb= 0 |
| 238 | m7_40= 0 ver= 0 |
| 239 | m7_95= 0 |
| 240 | m10_2= 1 |
| 241 | m12_2= 1 |
| 242 | Result (fr): |
| 243 | S15-S0 = 57ce = 0b0101011111001110 |
| 244 | Result (hr): |
| 245 | S15-S0 = 070e = 0b0000011100001110 |
| 246 | |
| 247 | Input: |
| 248 | m4_75= 1 smod= 0 |
| 249 | m5_15= 1 spare= 0 |
| 250 | m5_90= 0 icmi= 0 |
| 251 | m6_70= 0 nscb= 0 |
| 252 | m7_40= 1 ver= 0 |
| 253 | m7_95= 1 |
| 254 | m10_2= 0 |
| 255 | m12_2= 0 |
| 256 | Result (fr): |
| 257 | S15-S0 = 5733 = 0b0101011100110011 |
| 258 | Result (hr): |
| 259 | S15-S0 = 0733 = 0b0000011100110011 |
| 260 | |
| 261 | Input: |
| 262 | m4_75= 0 smod= 0 |
| 263 | m5_15= 1 spare= 0 |
| 264 | m5_90= 0 icmi= 0 |
| 265 | m6_70= 1 nscb= 0 |
| 266 | m7_40= 0 ver= 0 |
| 267 | m7_95= 1 |
| 268 | m10_2= 0 |
| 269 | m12_2= 1 |
| 270 | Result (fr): |
| 271 | S15-S0 = 56aa = 0b0101011010101010 |
| 272 | Result (hr): |
| 273 | S15-S0 = 062a = 0b0000011000101010 |
| 274 | |
| 275 | Input: |
| 276 | m4_75= 1 smod= 0 |
| 277 | m5_15= 0 spare= 0 |
| 278 | m5_90= 1 icmi= 0 |
| 279 | m6_70= 0 nscb= 0 |
| 280 | m7_40= 1 ver= 0 |
| 281 | m7_95= 0 |
| 282 | m10_2= 1 |
| 283 | m12_2= 0 |
| 284 | Result (fr): |
| 285 | S15-S0 = 5757 = 0b0101011101010111 |
| 286 | Result (hr): |
| 287 | S15-S0 = 0717 = 0b0000011100010111 |
| 288 | |
| 289 | Input: |
| 290 | m4_75= 1 smod= 0 |
| 291 | m5_15= 1 spare= 0 |
| 292 | m5_90= 1 icmi= 0 |
| 293 | m6_70= 1 nscb= 0 |
| 294 | m7_40= 1 ver= 0 |
| 295 | m7_95= 1 |
| 296 | m10_2= 1 |
| 297 | m12_2= 1 |
| 298 | Result (fr): |
| 299 | S15-S0 = 57ff = 0b0101011111111111 |
| 300 | Result (hr): |
| 301 | S15-S0 = 073f = 0b0000011100111111 |
| 302 | |
Philipp Maier | 8515d03 | 2018-09-25 15:57:49 +0200 | [diff] [blame] | 303 | Testing gsm48_mr_cfg_from_gsm0808_sc_cfg(): |
| 304 | Input: |
| 305 | S15-S0 = ff03 = 0b1111111100000011 |
| 306 | Output: |
| 307 | m4_75= 1 smod= 0 |
| 308 | m5_15= 1 spare= 0 |
| 309 | m5_90= 0 icmi= 1 |
| 310 | m6_70= 0 nscb= 0 |
| 311 | m7_40= 0 ver= 1 |
| 312 | m7_95= 0 |
| 313 | m10_2= 0 |
| 314 | m12_2= 0 |
| 315 | |
| 316 | Input: |
| 317 | S15-S0 = 0000 = 0b0000000000000000 |
| 318 | Output: |
| 319 | m4_75= 0 smod= 0 |
| 320 | m5_15= 1 spare= 0 |
| 321 | m5_90= 0 icmi= 1 |
| 322 | m6_70= 0 nscb= 0 |
| 323 | m7_40= 0 ver= 1 |
| 324 | m7_95= 0 |
| 325 | m10_2= 0 |
| 326 | m12_2= 0 |
| 327 | |
| 328 | Input: |
| 329 | S15-S0 = ff06 = 0b1111111100000110 |
| 330 | Output: |
| 331 | m4_75= 0 smod= 0 |
| 332 | m5_15= 1 spare= 0 |
| 333 | m5_90= 1 icmi= 1 |
| 334 | m6_70= 0 nscb= 0 |
| 335 | m7_40= 0 ver= 1 |
| 336 | m7_95= 0 |
| 337 | m10_2= 0 |
| 338 | m12_2= 0 |
| 339 | |
| 340 | Input: |
| 341 | S15-S0 = 3e08 = 0b0011111000001000 |
| 342 | Output: |
| 343 | m4_75= 0 smod= 0 |
| 344 | m5_15= 1 spare= 0 |
| 345 | m5_90= 0 icmi= 1 |
| 346 | m6_70= 1 nscb= 0 |
| 347 | m7_40= 0 ver= 1 |
| 348 | m7_95= 0 |
| 349 | m10_2= 0 |
| 350 | m12_2= 0 |
| 351 | |
| 352 | Input: |
| 353 | S15-S0 = 0c12 = 0b0000110000010010 |
| 354 | Output: |
| 355 | m4_75= 0 smod= 0 |
| 356 | m5_15= 1 spare= 0 |
| 357 | m5_90= 0 icmi= 1 |
| 358 | m6_70= 0 nscb= 0 |
| 359 | m7_40= 1 ver= 1 |
| 360 | m7_95= 0 |
| 361 | m10_2= 0 |
| 362 | m12_2= 0 |
| 363 | |
| 364 | Input: |
| 365 | S15-S0 = c020 = 0b1100000000100000 |
| 366 | Output: |
| 367 | m4_75= 0 smod= 0 |
| 368 | m5_15= 1 spare= 0 |
| 369 | m5_90= 0 icmi= 1 |
| 370 | m6_70= 0 nscb= 0 |
| 371 | m7_40= 0 ver= 1 |
| 372 | m7_95= 1 |
| 373 | m10_2= 0 |
| 374 | m12_2= 0 |
| 375 | |
| 376 | Input: |
| 377 | S15-S0 = 3040 = 0b0011000001000000 |
| 378 | Output: |
| 379 | m4_75= 0 smod= 0 |
| 380 | m5_15= 1 spare= 0 |
| 381 | m5_90= 0 icmi= 1 |
| 382 | m6_70= 0 nscb= 0 |
| 383 | m7_40= 0 ver= 1 |
| 384 | m7_95= 0 |
| 385 | m10_2= 1 |
| 386 | m12_2= 0 |
| 387 | |
| 388 | Input: |
| 389 | S15-S0 = c082 = 0b1100000010000010 |
| 390 | Output: |
| 391 | m4_75= 0 smod= 0 |
| 392 | m5_15= 1 spare= 0 |
| 393 | m5_90= 0 icmi= 1 |
| 394 | m6_70= 0 nscb= 0 |
| 395 | m7_40= 0 ver= 1 |
| 396 | m7_95= 0 |
| 397 | m10_2= 0 |
| 398 | m12_2= 1 |
| 399 | |
| 400 | Input: |
| 401 | S15-S0 = ff4b = 0b1111111101001011 |
| 402 | Output: |
| 403 | m4_75= 1 smod= 0 |
| 404 | m5_15= 1 spare= 0 |
| 405 | m5_90= 0 icmi= 1 |
| 406 | m6_70= 1 nscb= 0 |
| 407 | m7_40= 0 ver= 1 |
| 408 | m7_95= 0 |
| 409 | m10_2= 1 |
| 410 | m12_2= 0 |
| 411 | |
| 412 | Input: |
| 413 | S15-S0 = fcd2 = 0b1111110011010010 |
| 414 | Output: |
| 415 | m4_75= 0 smod= 0 |
| 416 | m5_15= 1 spare= 0 |
| 417 | m5_90= 0 icmi= 1 |
| 418 | m6_70= 0 nscb= 0 |
| 419 | m7_40= 1 ver= 1 |
| 420 | m7_95= 0 |
| 421 | m10_2= 1 |
| 422 | m12_2= 1 |
| 423 | |
| 424 | Input: |
| 425 | S15-S0 = c0a2 = 0b1100000010100010 |
| 426 | Output: |
| 427 | m4_75= 0 smod= 0 |
| 428 | m5_15= 1 spare= 0 |
| 429 | m5_90= 0 icmi= 1 |
| 430 | m6_70= 0 nscb= 0 |
| 431 | m7_40= 0 ver= 1 |
| 432 | m7_95= 1 |
| 433 | m10_2= 0 |
| 434 | m12_2= 1 |
| 435 | |
Holger Hans Peter Freyther | 9751081 | 2012-01-22 13:36:52 +0100 | [diff] [blame] | 436 | Done |