coding: implement encoding/decoding API for TCH/F2.4
See 3GPP TS 45.003 section 3.6. This channel mode is a bit special,
because unlike the other CSD specific channel modes it's interleaved
over 8 (not 22!) consecutive bursts, just like TCH/FS.
Change-Id: I4685376c8deb04db670684c9ebf685ad6fc989fa
Related: OS#1572
diff --git a/tests/coding/coding_test.c b/tests/coding/coding_test.c
index 7cef7b3..c9508f7 100644
--- a/tests/coding/coding_test.c
+++ b/tests/coding/coding_test.c
@@ -564,8 +564,14 @@
.half_rate = true,
},
{
+ .name = "TCH/F2.4",
+ .num_bits = 2 * 36,
+ .enc_fn = &gsm0503_tch_fr24_encode,
+ .dec_fn = &gsm0503_tch_fr24_decode,
+ },
+ {
.name = "TCH/H2.4",
- .num_bits = 2 * 72,
+ .num_bits = 4 * 36,
.enc_fn = &gsm0503_tch_hr24_encode,
.dec_fn = &gsm0503_tch_hr24_decode,
.half_rate = true,
diff --git a/tests/coding/coding_test.ok b/tests/coding/coding_test.ok
index c5c145d..1fc2f1d 100644
--- a/tests/coding/coding_test.ok
+++ b/tests/coding/coding_test.ok
@@ -445,6 +445,16 @@
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111
+test_csd(TCH/F2.4): block #0 (pattern 0x00): n_errors=0 / n_bits_total=456
+00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+00000000
+test_csd(TCH/F2.4): block #1 (pattern 0xaa): n_errors=0 / n_bits_total=456
+01010101 01010101 01010101 01010101 01010101 01010101 01010101 01010101
+01010101
+test_csd(TCH/F2.4): block #2 (pattern 0xff): n_errors=0 / n_bits_total=456
+11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
+11111111
+
test_csd(TCH/H2.4): block #0 (pattern 0x00): n_errors=0 / n_bits_total=456
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
@@ -527,6 +537,18 @@
test_csd(TCH/H4.8): FACCH/H (pattern 0x2b): n_errors=0 / n_bits_total=456
2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b
+test_csd(TCH/F2.4): block #0 (pattern 0x00): n_errors=0 / n_bits_total=456
+00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+00000000
+test_csd(TCH/F2.4): block #1 (pattern 0xaa): n_errors=138 / n_bits_total=456
+11000010 10010010 10010010 10010010 10010010 10010010 10010101 00011000
+01001010
+test_csd(TCH/F2.4): block #2 (pattern 0xff): n_errors=0 / n_bits_total=456
+11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
+11111111
+test_csd(TCH/F2.4): FACCH/F (pattern 0x2b): n_errors=0 / n_bits_total=456
+2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b
+
test_csd(TCH/H2.4): block #0 (pattern 0x00): n_errors=38 / n_bits_total=456
00000000 00000000 00000101 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000