
==== Running test_idle_ready()
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
Initial status: 0x00000000
circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
osmo_v110_ta_frame_in(): all bits set to binary '1'
    D-bits: 111111111111111111111111111111111111111111111111
    E-bits: 1111111
    S-bits: 111111111
    X-bits: 11
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event RX_FRAME_IND
v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
osmo_v110_ta_frame_in() returns 0
osmo_v110_ta_frame_out(): expecting all bits set to binary '1'
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event TX_FRAME_RTS
osmo_v110_ta_frame_out() returns 0
    D-bits: 111111111111111111111111111111111111111111111111
    E-bits: 1111111
    S-bits: 111111111
    X-bits: 11
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
setting circuit 108/DTR (Data Terminal Ready) OFF
DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
osmo_v110_ta_set_circuit() returns 0
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Deallocated

==== Running test_conn_ta_line()
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_frame_out(): S-/X-bits are expected to be 1 (OFF)
osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS
osmo_v110_ta_frame_out() returns 0
    D-bits: 111111111111111111111111111111111111111111111111
    E-bits: 1111111
    S-bits: 111111111
    X-bits: 11
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS
osmo_v110_ta_frame_out() returns 0
    D-bits: 111111111111111111111111111111111111111111111111
    E-bits: 1111111
    S-bits: 000000000
    X-bits: 00
osmo_v110_ta_frame_in(): S-/X-bits are OFF, expect no state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 111111111
    X-bits: 11
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
osmo_v110_ta_frame_in() returns 0
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000001e)
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
DLGLOBAL DEBUG V110-TA(test_conn_ta_line){DATA_TRANSFER}: Deallocated

==== Running test_data_transfer()
DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000001e)
DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
circuit 106/CTS (Clear to Send) is ON (expected to be ON)
circuit 107/DSR (Data Set Ready) is ON (expected to be ON)
circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON)
osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): E1..E3-bits are expected to be 011 (9600)
osmo_v110_ta_frame_out(): we also expect the .tx_cb() to be called
DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event TX_FRAME_RTS
v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_out() returns 0
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
osmo_v110_ta_frame_in(): feed that frame that we pulled out back into the TA
DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event RX_FRAME_IND
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Deallocated

==== Running test_data_transfer_disc_local()
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000001e)
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
local TE initiates disconnection
setting circuit 108/DTR (Data Terminal Ready) OFF
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s)
v110_ta_test_status_update_cb(status=0x00000014)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_frame_out(): S-bits are expected to be 1 (OFF)
osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): D-bits are all expected to be 0
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event TX_FRAME_RTS
osmo_v110_ta_frame_out() returns 0
    D-bits: 000000000000000000000000000000000000000000000000
    E-bits: 1111111
    S-bits: 111111111
    X-bits: 00
circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
circuit 107/DSR (Data Set Ready) is ON (expected to be ON)
circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON)
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect no state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
osmo_v110_ta_frame_in(): S-bits are OFF, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 111111111
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
osmo_v110_ta_frame_in() returns 0
circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Deallocated

==== Running test_data_transfer_disc_remote()
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000001e)
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
remote TE initiates disconnection
osmo_v110_ta_frame_in(): S-bits are OFF, X-bits are ON
osmo_v110_ta_frame_in(): D-bits are all set to 0
    D-bits: 000000000000000000000000000000000000000000000000
    E-bits: 0111111
    S-bits: 111111111
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000000a)
osmo_v110_ta_frame_in() returns 0
circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
local TE confirms disconnection
setting circuit 108/DTR (Data Terminal Ready) OFF
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s)
v110_ta_test_status_update_cb(status=0x00000000)
osmo_v110_ta_set_circuit() returns 0
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: Received Event DESYNC_IND
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Deallocated

==== Running test_syncing()
DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Allocated
DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to IDLE_READY (no timeout)
v110_ta_test_status_update_cb(status=0x00000000)
setting circuit 108/DTR (Data Terminal Ready) ON
DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Received Event V24_STATUS_CHG
DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
osmo_v110_ta_set_circuit() returns 0
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
v110_ta_test_status_update_cb(status=0x0000001e)
DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_in() returns 0
osmo_v110_ta_sync_ind(): the lower layer indicates out-of-sync event
DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event DESYNC_IND
DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: State change to RESYNCING (X1, 3s)
osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): X-bits are expected to be 1 (OFF)
osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb()
DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event TX_FRAME_RTS
v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_out() returns 0
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 11
osmo_v110_ta_sync_ind(): the lower layer indicates sync event
DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event SYNC_IND
DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: State change to DATA_TRANSFER (no timeout)
v110_ta_test_status_update_cb(status=0x0000001e)
osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON)
osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb()
DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event TX_FRAME_RTS
v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
osmo_v110_ta_frame_out() returns 0
    D-bits: 010101010101010101010101010101010101010101010101
    E-bits: 0111111
    S-bits: 000000000
    X-bits: 00
DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Deallocated