tree a11a7c755975f506f1b048990d0d1b3fee999775
parent b3b474d8ade2c28ab8b0e3021dea87fae19b333c
author Harald Welte <laforge@osmocom.org> 1596398070 +0200
committer Harald Welte <laforge@osmocom.org> 1596398225 +0200

i460: Fix bit- and subslots ordering of I.460 mux + demux

When I wrote the new I.460 mux + demux code, I failed to realize that
* bit numbers in relevant ITU specs start with 1 as MSB ... 8 as LSB
* sub-slot 0 is bits 1+2, i.e. the two MSBs of a byte
* bit-ordering within each sub-slot is also MSB first

As a result, the code and test data was broken.

Change-Id: I6df7dbf411efbdeaf516e72ac552432bf5a569d0