Fix uplink sub_slot and sub_types assignment in the sdcch4 and bcch_ccch demappers blocks
Add support for RACH bursts although they are not yet supported in the
receiver and control channel decoder blocks.
3GPP TS 45.002 version 15.1.0 Release 15
Table 3 : Mapping of logical channels onto physical channels (see subclauses 6.3, 6.4, 6.5)
Figure 8a: TDMA frame mapping for FCCH + SCH + BCCH + CCCH
Fixes the following tests:
qa_gsm_bcch_ccch_demapper.test_uplink
qa_gsm_bcch_ccch_sdcch4_demapper.test_uplink
Change-Id: Ia6b3070c1085bcdda6d98fd94a89c6e0982e2aec
diff --git a/python/demapping/gsm_bcch_ccch_sdcch4_demapper.py b/python/demapping/gsm_bcch_ccch_sdcch4_demapper.py
index 7b6a04d..bff67a4 100644
--- a/python/demapping/gsm_bcch_ccch_sdcch4_demapper.py
+++ b/python/demapping/gsm_bcch_ccch_sdcch4_demapper.py
@@ -51,7 +51,161 @@
##################################################
# Blocks
##################################################
- self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(timeslot_nr, ([0,0,2,2,2,2,6,6,6,6,0,0,12,12,12,12,16,16,16,16,0,0,22,22,22,22,26,26,26,26,0,0,32,32,32,32,36,36,36,36,0,0,42,42,42,42,46,46,46,46,0]), ([0,0,1,1,1,1,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,7,7,7,7,7,7,7,7,0,0,7,7,7,7,7,7,7,7,0,0,135,135,135,135,135,135,135,135,0]), ([0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,3,3,3,3,0,0,2,2,2,2,3,3,3,3,0]), ([0,0,0,0,0,0,6,6,6,6,10,10,10,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,37,37,37,37,41,41,41,41,0,0,47,47,47,47]), ([7,7,7,7,0,0,135,135,135,135,135,135,135,135,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,7,7,7,7,7,7,7,7,0,0,7,7,7,7]), ([0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,0,0,0,0,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3]))
+
+ # 3GPP TS 45.002 version 15.1.0 Release 15
+ # Table 3 : Mapping of logical channels onto physical channels (see subclauses 6.3, 6.4, 6.5)
+ #
+ # BCCH Norm D 0,2,4,6 C0 NB 51 B(2..5)
+ # SDCCH/4 0 D 0 C0 NB1 51 B(22..25)
+ # U B(37..40)
+ # 1 D B(26..29)
+ # U B(41..44)
+ # 2 D B(32..35)
+ # U B(47..50)
+ # 3 D B(36..39)
+ # U B(0..3)
+ # SACCH/C4 0 D 0 C0 NB3 102 B(42..45)
+ # U B(57..60)
+ # 1 D B(46..49)
+ # U B(61..64)
+ # 2 D B(93..96)
+ # U B(6..9)
+ # 3 D B(97..100)
+ # U B(10..13)
+ #
+ # Figure 8b: TDMA frame mapping for FCCH + SCH + BCCH + CCCH + SDCCH/4(0...3) + SACCH/4(0...3)
+ #
+ self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(
+ timeslot_nr, ([ #downlink
+ 0,0,
+ 2,2,2,2,
+ 6,6,6,6,
+ 0,0,
+ 12,12,12,12,
+ 16,16,16,16,
+ 0,0,
+ 22,22,22,22,
+ 26,26,26,26,
+ 0,0,
+ 32,32,32,32,
+ 36,36,36,36,
+ 0,0,
+ 42,42,42,42,
+ 46,46,46,46,
+ 0,
+ ]), ([
+ 0,0,
+ 1,1,1,1,
+ 2,2,2,2,
+ 0,0,
+ 2,2,2,2,
+ 2,2,2,2,
+ 0,0,
+ 7,7,7,7,
+ 7,7,7,7,
+ 0,0,
+ 7,7,7,7,
+ 7,7,7,7,
+ 0,0,
+ 135,135,135,135,
+ 135,135,135,135,
+ 0,
+ ]), ([
+ 0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,
+ 1,1,1,1,
+ 2,2,2,2,
+ 0,0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,
+ 2,2,2,2,
+ 3,3,3,3,
+ 0,0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,
+ 0,
+ 1,1,1,1,
+ 2,2,2,2,
+ 0,0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,
+ 2,2,2,2,
+ 3,3,3,3,
+ 0,0,
+ 2,2,2,2,
+ 3,3,3,3,
+ 0,
+ ]), ([ #uplink
+ 0,0,0,0,
+ 4,5,
+ 6,6,6,6,
+ 10,10,10,10,
+ 14,15,16,17,
+ 18,19,20,21,
+ 22,23,24,25,
+ 26,27,28,29,
+ 30,31,32,33,
+ 34,35,36,
+ 37,37,37,37,
+ 41,41,41,41,
+ 45,46,
+ 47,47,47,47,
+ ]), ([
+ 7,7,7,7,
+ 3,3,
+ 135,135,135,135,
+ 135,135,135,135,
+ 3,3,3,3,
+ 3,3,3,3,
+ 3,3,3,3,
+ 3,3,3,3,
+ 3,3,3,3,
+ 3,3,
+ 3,
+ 7,7,7,7,
+ 7,7,7,7,
+ 3,3,
+ 7,7,7,7,
+ ]), ([
+ 3,3,3,3,
+ 0,0,
+ 2,2,2,2,
+ 3,3,3,3,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,
+ 0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,
+ 2,2,2,2,
+ 3,3,3,3,
+ 0,0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,0,0,
+ 0,0,
+ 0,
+ 0,0,0,0,
+ 1,1,1,1,
+ 0,0,
+ 2,2,2,2,
+ ]))
##################################################
# Connections